Quantum computing is a transformative technology providing exponential speedup over classical computing for specific computational problems. At the foundation of computing lies arithmetic, with addition as a fundamental operation for subtraction, multiplication, division, and other operations. In this paper, we evaluate the performance of quantum arithmetic circuits – including half adders, full adders, Toffoli-based adders, Quantum Fourier Transform (QFT)-based adders, and quantum comparators – on IBM’s Eagle Processor, a 127-qubit superconducting Quantum Processing Unit (QPU) accessible through the IBM Quantum cloud platform. These circuits are implemented using IBM Qiskit and tested on both ideal and noisy simulators to validate their functionality before execution on quantum hardware. Experimental results show that the probabilities of accurate computations are notably low, even for smaller input sizes, due to hardware imperfections such as shorter qubit coherence times and limited qubit stability. A comparative analysis of Toffoli-based and QFT-based adders demonstrates that Toffoli-based adders have higher accuracy, making them more suitable for precise quantum arithmetic operations. These findings highlight the significant impact of quantum hardware imperfections on the reliability of arithmetic operations.
Quantum computing is a transformative technology providing exponential speedup over classical computing for specific computational problems. At the foundation of computing lies arithmetic, with addition as a fundamental operation for subtraction, multiplication, division, and other operations. In this paper, we evaluate the performance of quantum arithmetic circuits – including half adders, full adders, Toffoli-based adders, Quantum Fourier Transform (QFT)-based adders, and quantum comparators – on IBM’s Eagle Processor, a 127-qubit superconducting Quantum Processing Unit (QPU) accessible through the IBM Quantum cloud platform. These circuits are implemented using IBM Qiskit and tested on both ideal and noisy simulators to validate their functionality before execution on quantum hardware. Experimental results show that the probabilities of accurate computations are notably low, even for smaller input sizes, due to hardware imperfections such as shorter qubit coherence times and limited qubit stability. A comparative analysis of Toffoli-based and QFT-based adders demonstrates that Toffoli-based adders have higher accuracy, making them more suitable for precise quantum arithmetic operations. These findings highlight the significant impact of quantum hardware imperfections on the reliability of arithmetic operations.
This article demonstrates a quantum calculator by experimentally simulating and performing basic arithmetic operations, namely addition, subtraction, multiplication, division on real quantum devices using the IBM Quantum Experience (IBM QE) platform. Two addition algorithms are considered, the classical version, using the Toffoli gate, and using the quantum Fourier transform (QFT). In particular summation with QFT saves memory and time. The task of the work is to build a quantum circuit that performs arithmetic operations between the binary representation of two integers. We then propose a quantum algorithm for converting decimal to binary. This method also allows for massive parallelization during its execution. The addition, subtraction, multiplication, and division functions based on QFT have been improved with some changes. The proposed operations are compared with the closest quantum arithmetic operations. Therefore, we can implement a practical quantum calculator by performing operations on a real quantum computer. The circuits are defined as a kind of quantum adder using a quantum Fourier transform, implemented in Qiskit and demonstrated on one or two copies.
Quantum computing (Q-computing) is a revolutionary technology that applies quantum mechanics (QM) to implement calculations significantly quicker than traditional computers. Q-computing employs Q-bits (qubits) rather than classical bits, which can take on a superposition state, making it possible to represent both 0 and 1 at once. This distinctive property allows qubits to perform multiple calculations simultaneously, making Q computers exponentially more powerful as more qubits are added, compared to the linear scaling of classical computers. However, challenges such as qubit instability and error rates remain significant obstacles to fully realizing this potential. A vital aspect of this technology is the development of Q arithmetic circuits, which act as the foundational blocks for efficiently executing Q algorithms. Q half-adder and full-adder circuits are integral to performing fundamental arithmetic operations within Q computers. In contrast to classical adders, Q adders rely on Q gates such as Controlled NOT (CNOT) and Toffoli gates. These gates exploit Q phenomena like entanglement and superposition, allowing for more efficient computations. The Q half-adder consists of two qubits and adds two single bits, producing a carry and sum output. It utilizes the CNOT gate to compute the sum and the Toffoli gate (controlled-controlled-NOT [CCNOT]) to compute the carry. The Q full-adder builds on this, adding three qubits to produce a sum and a carry output, further increasing computational capacity. Through the entanglement of qubits, these circuits allow for more parallelism and speed compared to classical adders. Q carry-look-ahead adders (QCLAs) and Q ripple-carry adders (QRCAs) are used to perform more complex arithmetic operations based on these half-adder and full-adder structures. Q arithmetic circuits have broad applications, boosting secure key generation in cryptography, speeding up matrix operations for faster model training in machine learning, and enabling more precise, efficient image transformations in Q image processing, benefiting fields like medical imaging and computer vision.
The Quantum Fourier Transform (QFT) grants competitive advantages, especially in resource usage and circuit approximation, for performing arithmetic operations on quantum computers, and offers a potential route towards a numerical quantum-computational paradigm. In this paper, we utilize efficient techniques to implement QFT-based integer addition and multiplications. These operations are fundamental to various quantum applications including Shor's algorithm, weighted sum optimization problems in data processing and machine learning, and quantum algorithms requiring inner products. We carry out performance evaluations of these implementations based on IBM's superconducting qubit architecture using different compatible noise models. We isolate the sensitivity of the component quantum circuits on both one-/two-qubit gate error rates, and the number of the arithmetic operands' superposed integer states. We analyze performance, and identify the most effective approximation depths for quantum add and quantum multiply within the given context. We observe significant dependency of the optimal approximation depth on the degree of machine noise and the number of superposed states in certain performance regimes. Finally, we elaborate on the algorithmic challenges - relevant to signed, unsigned, modular and non-modular versions - that could also be applied to current implementations of QFT-based subtraction, division, exponentiation, and their potential tensor extensions. We analyze performance trends in our results and speculate on possible future development within this computational paradigm.
Abstract The Quantum Fourier Transform (QFT) grants competitive advantages, especially in resource usage and circuit approximation, for performing arithmetic operations on quantum computers , and offers a potential route towards a numerical quantum-computational paradigm. In this paper, we utilize efficient techniques to implement QFT-based integer addition and multiplications. These operations are fundamental to various quantum applications including Shor’s algorithm, weighted sum optimization problems in data processing and machine learning, and quantum algorithms requiring inner products. We carry out performance evaluations of these implementations based on IBM’s superconducting qubit architecture using different compatible noise models. We isolate the sensitivity of the component quantum circuits on both one-/two-qubit gate error rates, and the number of the arithmetic operands’ superposed integer states. We analyze performance, and identify the most effective approximation depths for unsigned quantum addition and quantum multiplication within the given context. We then perform a similar analysis of signed addition and compare to the unsigned results. We observe significant dependency of the optimal approximation depth on the degree of machine noise and the number of superposed states in certain performance regimes. Finally, we elaborate on the algorithmic challenges - relevant to signed, unsigned, modular and non-modular versions - that could also be applied to current implementations of QFT-based subtraction, division, exponentiation, and their potential tensor extensions. We analyze the performance trends in our results and speculate on possible future developments within this computational paradigm.
Addition is a key arithmetic operation in computing, as the rest of arithmetic operations are somewhat based on it. Focusing on quantum computing, addition can be implemented in different ways, such as adapting the ripple-carry adder from classical computing, or using a QFT-based adder, which is more efficient than the former. However, a Toffoli-based adder is in fact an alternative way to optimize QFT-based adders by merging rotation gates into a string of controlled-NOT and Toffoli gates with different control qubits. In this paper, the basics of matrix analysis of quantum circuits are described, which in turn are used to perform a matrix analysis of Toffoli adder circuits.
Quantum computing is an emerging computational paradigm that represents and processes information using quantum states. This paper presents the implementation and simulation of a Quantum Half Adder using the IBM Qiskit framework. The proposed circuit performs one-bit binary addition and produces two outputs, SUM and CARRY, through reversible quantum operations. Classical input values are encoded into quantum states using Pauli-X gates. Controlled-NOT (CNOT) gates are used to realize the XOR relationship required for SUM generation, while a Toffoli (CCNOT) gate realizes the AND relationship required for CARRY generation. The complete design is implemented in Python and executed using the Qiskit Aer Simulator. Four possible input combinations are evaluated and the measured outputs are compared with the expected Half Adder truth table. Circuit visualization, terminal output, and measurement histograms are used to verify the operation. The results show that the simulated circuit produces the expected SUM and CARRY values for all input combinations. The work provides a simple practical model for understanding reversible quantum computation, quantum gates, and Qiskit-based quantum circuit simulation.