This paper presents a predictive error suppression architecture for quantum computing that eliminates reliance on physical redundancy. By constructing a digital twin of the quantum processor, a classical system models and predicts noise as deviations from ideal quantum states in real time. The predicted noise is then used to correct measurement outcomes or apply compensatory operations, significantly improving computational accuracy on NISQ devices. This approach shifts the challenge of error correction from hardware scaling to computational modeling, enabling scalable, adaptive, and practical quantum computing systems.
This paper presents a predictive error suppression architecture for quantum computing that eliminates reliance on physical redundancy. By constructing a digital twin of the quantum processor, a classical system models and predicts noise as deviations from ideal quantum states in real time. The predicted noise is then used to correct measurement outcomes or apply compensatory operations, significantly improving computational accuracy on NISQ devices. This approach shifts the challenge of error correction from hardware scaling to computational modeling, enabling scalable, adaptive, and practical quantum computing systems.
Quantum computing is entering a transitional regime between noisy intermediate-scale quantum (NISQ) processing and early fault-tolerant quantum computation (FTQC), in which increasingly capable hardware is beginning to support repeated syndrome measurements, partial error correction, and logical-qubit operations, while residual physical and logical errors remain non-negligible. In this regime, error suppression, error mitigation, and quantum error correction are increasingly better viewed as complementary layers of a unified error-reduction strategy rather than as separate approaches, with each acting at a different stage of the quantum computation to improve simulation reliability. Thus, in this review, we provide a practical and forward-looking overview of the principal hardware error sources and the corresponding error suppression and mitigation methods for reducing their impact across the current NISQ-FTQC transition. We discuss hardware-aware circuit design, coherent-error suppression, readout mitigation, noise extrapolation, classical inference, and software-supported workflows, with particular emphasis on their implementation on actual quantum processors. We further examine how error mitigation techniques can be adapted to encoded and logical-qubit settings so that they can operate alongside quantum error correction to suppress residual logical errors and improve the accuracy of computation in the early fault-tolerant regime.
The pursuit of high-fidelity digital quantum simulation is fundamentally constrained by the inevitable presence of noise in current and near-term quantum processors. While quantum error correction ultimately promises fault-tolerance, its substantial qubit overhead renders it impractical for the noisy intermediate-scale quantum (NISQ) era. This research addresses the critical gap between hardware imperfections and simulation accuracy by designing systematic, resource-efficient machine learning (ML) error-mitigation protocols tailored specifically for digital quantum simulation. Unlike generic error-suppression methods, our approach exploits the unique structural properties of simulated quantum dynamics—including time-translation invariance, locality of interactions, and conserved quantities—to inform the training of lightweight neural networks and Gaussian process regressors. We develop a hybrid framework that combines randomized compiling with data-driven noise-inversion models, enabling real-time estimation and subtraction of both coherent and incoherent errors without exponential sampling overhead. Through extensive numerical benchmarks on spin-chain and Fermi-Hubbard models, we demonstrate that our ML protocols achieve up to an order-of-magnitude reduction in infidelity compared to standard probabilistic error cancellation and zero-noise extrapolation, while requiring fewer calibration circuits. Furthermore, we introduce an adaptive online learning scheme that continuously refines the mitigation model during the simulation runtime, automatically adjusting to time-dependent drift in hardware noise. Our results establish a practical pathway toward scalable, high-accuracy quantum simulations on existing devices, with implications for condensed matter physics, quantum chemistry, and the development of quantum advantage benchmarks.
Correlated noise significantly hampers qubit stability and computational precision in quantum computing. Traditional error mitigation techniques assume independent noise and fail to adapt dynamically to evolving error patterns. To address this, we propose an AI-driven noise reduction framework that employs a Recurrent Neural Network (RNN)-Transformer architecture, achieving 92.4% accuracy in real-time noise prediction. Integrated federated learning enables secure, cross-device adaptation while preserving user privacy. Additionally, Bayesian optimization and adaptive gate reconfiguration reduce logical error rates by43%and improve gate fidelity by35%, enhancing overall computational reliability. Using IBM Quantum Falcon hardware, the proposed framework demonstrated superior stability and noise suppression compared to conventional methods. Through simulation and partial hardware validation, the reinforcement learning (RL) component effectively adapted error-correction strategies under varying noise conditions, ensuring continuous optimization. The framework's scalability and hardware independence were further confirmed through successful deployment on IBM Qiskit and Google Cirq, highlighting adaptability across heterogeneous quantum architectures. This study lays a robust foundation for advancing stable, accurate, and practical quantum computation.
Abstract Quantum computing has recently emerged as a novel paradigm for solving problems otherwise intractable on classical computers, yet the practical progress of quantum computers is severely impacted by noise, decoherence, and imperfect gate operations in Noisy Intermediate-Scale Quantum (NISQ) devices. Specific to IBM Quantum hardware, imperfections due to readout error, gate errors, and device drift, which depends on time, resolves limits for the accuracy of outputs from our algorithms. The mitigation strategies currently used, for example, Measurement Error Mitigation (MEM), Zero Noise Extrapolation (ZNE), and Clifford Data Regression (CDR), offer improvement over raw, unmitigated outputs, but they are static and not dynamic; the reduction of noise in within an NISQ device is temporal and can vary in patterns that are non-zero. In addition to this, using the conventional methods provides inconsistent and suboptimal results.This study will provide enhanced reliability with respect to performing quantum computation on IBM Quantum hardware with a unique mitigation framework that is adaptive and computationally efficient for a high-fidelity output. The problem taken on here is the failure of existing error mitigation strategies to provide adaptive noise compensation, as they assume a statically-distributed error, despite the performance-related characteristics already being documented in regards to calibration drift and variation over time.To achieve this, we propose a Hybrid Adaptive Error Mitigation (HAEM) approach that includes baseline measurement error mitigation and an additional correction layer that utilizes realtime calibration information, along with lightweight machine learning models. The approach can be broken down into three steps: (i) perform standard measurement error mitigation to reduce classical readout noise, (ii) execute compact calibration circuits, such as Bell states, GHZ states and Clifford benchmarks to capture then current error profile of the device, and (iii) use a lightweight machine learning model (having been trained on historical and newest calibration data) to dynamically change the mitigation weights applied for the target quantum algorithm. All implementation is done using Qiskit Runtime to ensure low-latency execution, and we completed experiments on both Qiskit Aer noisy simulators and IBM Quantum devices.Initial results suggest HAEM improved the outputs of quantum algorithms' fidelity compared to the unmitigated runs and the baseline measurement error mitigation (MEM) runs. On the noisy simulators, HAEM increased fidelity from a raw performance of 0.65 to 0.87, nearly a 34% improvement. In fairer hardware-like scenarios, fidelity-on-average was persistently 12% better than MEM, with nearly equal time duration for the additional adaptive measurements. The adaptive aspect of HAEM consistently supported subsequent calibration cycles of the device and was effective to continue providing fidelity improvements despite the static mitigation performance degrading.To sum up, the proposed HAEM framework is a modern and viable alternative for error mitigation which brings together the benefits of baseline approaches with corrections that are driven by fixed-function error-corrective, adaptive learning. As both learning-based and standard baseline approaches can only achieve fixed levels of performance, HAEM, through its use of noise mitigation both at execution time and through correlating it with standard data, provides a route towards reliable quantum computations on current IBM hardware. HAEM also presents a contribution to the NISQ error-resilient landscape, and however it is intended that it will continue to improve future applications of hybrid workflows of quantum and classical computation where error mitigation and resilience is important.
The rapid evolution of Noisy Intermediate-Scale Quantum (NISQ) devices has intensified the need for robust compilation strategies capable of mitigating hardware-induced errors while maximizing computational efficiency. Quantum compilers play a pivotal role in translating high-level quantum algorithms into hardware-executable instructions, yet they face significant challenges related to qubit connectivity constraints, limited coherence times, and stochastic noise. This paper examines error-resilient quantum compiler design for efficient qubit mapping, gate optimization, and noise mitigation in NISQ-era devices, proposing a framework that integrates topology-aware mapping, adaptive gate synthesis, and probabilistic error suppression techniques. By synthesizing advances in quantum circuit optimization, hardware-aware scheduling, and hybrid classical–quantum error correction strategies, the study evaluates how compiler-level innovations can substantially enhance execution fidelity and resource efficiency. The findings suggest that intelligent compiler architectures are critical enablers of practical quantum advantage during the transitional NISQ phase, bridging theoretical algorithm design with real-world hardware constraints.
Analog quantum simulation has been proposed as an efficient approach for
probing classically intractable many-body physics. In contrast to digital,
gate-based quantum simulation, the analog approach involves configuring the
quantum hardware to directly mimic the physics of the target system. This
reduces the level of control required and can offer a degree of inherent
robustness, but it comes at the cost that known error-handling techniques may
be inapplicable. Accumulation of error is thus a major challenge facing
medium-scale and large-scale analog quantum simulation with current and
near-term noisy quantum (NISQ) devices. Here we propose a hybrid error
mitigation scheme that can suppress general local Markovian noise in analog
quantum simulators. We employ stochastic error mitigation for physical noise
and use Richardson extrapolation to compensate for model estimation error. We
numerically test the error mitigation scheme for an Ising-type Hamiltonian with
energy relaxation and dephasing noise, and show an improvement of simulation
accuracy by two orders. We assess the resource cost of our error mitigation
scheme and conclude that analog quantum simulation at scale is feasible with
NISQ hardware.