International Conference on Information and Communication Technology Convergence (ICTC)
LNOMS-SS: A Low-Complexity LDPC Decoding Algorithm with Hardware Implementation
Kaishi Wang, Cheng Wang, Songsong Cai, Jiewen Jiang, Xi Gong, Weidong WANG
Abstract
With the development of low orbit satellite communication technology, how to improve the communication speed of satellite communication systems and reduce the complexity of system design has become an important research issue. Since the invention of LDPC codes, their excellent decoding performance has been favored by researchers. QC-LDPC codes have become the channel coding scheme for the fifth generation new radio (5G NR) data channel, but at the same time, it has also brought challenges to hardware design. We propose the Layered Normalized Offset Minsum and three layer static scheduling (LNOMS-SS) algorithm. On the basis of the traditional Layered Normalized Minsum algorithm (LNMS) and Layered Offset Minsum algorithm (LOMS), the update order of each layer during hierarchical decoding is determined based on the row weight, column weight, and the number of perforated non-zero elements in the BG matrix. We also implemented the algorithm in hardware and designed an 8-levels LDPC decoder. We proposed innovative designs such as a pre-processing based routing network, a segment approximation based Minsum calculation module, and an improved checksum module. The simulation and implementation results show that our proposed LNOMS-SS algorithm has stronger performance than other algorithms, with lower hardware resource consumption and decoding latency.