Abstract Quantum squaring circuits play a critical role in many quantum algorithms; however, most existing designs incur a significant qubit overhead due to the loss of input states and excessive use of ancillary qubits. In this work, we introduce a qubit-efficient quantum circuit for integer squaring that achieves a linear qubit cost of only 3 N qubits for an N -bit input, significantly outperforming state-of-the-art designs that scale quadratically in terms of qubits. Our approach reintegrates the input operand after computation, enabling the uncomputation of intermediate results and efficient recycling of ancilla qubits. This reversible strategy prevents the retention of redundant information, which is a common limitation of prior works. The comparative analysis confirms the scalability and practicality of our design for qubit-constrained quantum hardware, offering a promising solution for arithmetic operations in resource-limited quantum environments.
Abstract Quantum squaring circuits play a critical role in many quantum algorithms; however, most existing designs incur a significant qubit overhead due to the loss of input states and excessive use of ancillary qubits. In this work, we introduce a qubit-efficient quantum circuit for integer squaring that achieves a linear qubit cost of only 3 N qubits for an N -bit input, significantly outperforming state-of-the-art designs that scale quadratically in terms of qubits. Our approach reintegrates the input operand after computation, enabling the uncomputation of intermediate results and efficient recycling of ancilla qubits. This reversible strategy prevents the retention of redundant information, which is a common limitation of prior works. The comparative analysis confirms the scalability and practicality of our design for qubit-constrained quantum hardware, offering a promising solution for arithmetic operations in resource-limited quantum environments.
Quantum computation is modeled by quantum circuits. All the quantum operations are reversible so the quantum circuits can be built using reversible logic gates. Reversible computing is the emerging technology, its major role is in the field of quantum computing, optical computing, and design of low power nanocircuits. The most frequently used computational unit for digital signal processing and multimedia applications is multiplier. To compute square of an operand, regular multipliers are used in general. This paper proposes a dedicated quantum circuit for computing square of an operand efficiently compared to the existing multipliers in the literature. The squaring unit is mathematically modeled and its metrics quantum cost, garbage outputs and ancilla input, gate count are calculated. We compared the proposed design with the existing multipliers to compute square and found that proposed square unit is efficient in terms of quantum cost, garbage outputs, ancilla inputs and gate count. The proposed reversible square circuit has 63% to 85% improvement of quantum cost, garbage outputs, ancilla inputs and gate count over existing reversible multiplier circuits.
A reversible logic has application in quantum computing. A reversible logic design needs resources such as ancilla and garbage qubits to reconfigure circuit functions or gate functions. The removal of garbage qubits and ancilla qubits are essential in designing an efficient quantum circuit. In the literature, there are multiple designs that have been proposed for a reversible multiplication operation. A multiplication hardware is essential for the circuit design of quantum algorithms, quantum cryptanalysis, and digital signal processing (DSP) applications. The existing designs of reversible quantum integer multipliers suffer from redundant garbage qubits. In this work, we propose a reversible logic based, garbage-free and ancilla qubit optimized design of a quantum integer multiplier. The proposed quantum integer multiplier utilizes a novel add and rotate methodology that is specially suitable for a reversible computing paradigm. The proposed design methodology is the modified version of a conventional shift and add method. The proposed design of the quantum integer multiplier incorporates add or no operation based on multiplier qubits and followed by a rotate right operation. The proposed design of the quantum integer multiplier produces zero garbage qubits and shows an improvement ranging from 60% to 90% in ancilla qubits count over the existing work on reversible quantum integer multipliers.
Quantum computers offer the potential to extend our abilities to tackle computational problems in fields such as number theory, encryption, search and scientific computation. Up to a superpolynomial speedup has been reported for quantum algorithms in these areas. Motivated by the promise of faster computations, the development of quantum machines has caught the attention of both academics and industry researchers. Quantum machines are now at sizes where implementations of quantum algorithms or their components are now becoming possible. In order to implement quantum algorithms on quantum machines, resource efficient circuits and functional blocks must be designed. In this work, we propose quantum circuits for Galois and integer arithmetic. These quantum circuits are necessary building blocks to realize quantum algorithms. The design of resource efficient quantum circuits requires the designer takes into account the gate cost, quantum bit (qubit) cost, depth and garbage outputs of a quantum circuit. Existing quantum machines do not have many qubits meaning that circuits with high qubit cost cannot be implemented. In addition, quantum circuits are more prone to errors and garbage output removal adds to overall cost. As more gates are used, a quantum circuit sees an increased rate of failure. Failures and error rates can be countered by using quantum error correcting codes and fault tolerant implementations of universal gate sets (such as Clifford+T gates). However, Clifford+T gates are costly to implement with the T gate being significantly more costly than the Clifford gates. As a result, designers working with Clifford+T gates seek to minimize the number of T gates (T-count) and the depth of T gates (T-depth). In this work, we propose quantum circuits for Galois and integer arithmetic with lower T-count, T-depth and qubit cost than existing work. This work presents novel quantum circuits for squaring and exponentiation over binary extension fields (Galois fields of form GF(2 m )). The proposed circuits are shown to have lower depth, qubit and gate cost to existing work. We also present quantum circuits for the core operations of multiplication and division which enjoy lower T-count, T-depth and qubit costs compared to existing work. This work also illustrates the design of a T-count and qubit cost efficient design for the square root. This work concludes with an illustration of how the arithmetic circuits can be combined into a functional block to implement quantum image processing algorithms.
Quantum computing has advanced rapidly in recent decades, driven by developments across the technology stack, including quantum error-correcting codes and efficient quantum algorithms. Among these, quantum arithmetic circuits serve as fundamental building blocks for various promising algorithms. Despite their crucial role, the design of quantum arithmetic circuits faces challenges arising from the no-cloning theorem, qubit limitations, and circuit depth constraints, which significantly impact the efficiency of large-scale quantum computing. We provide an overview of quantum arithmetic circuits in the context of public-key cryptanalysis, with particular emphasis on optimization strategies such as measurement-based uncomputation and conditionally clean ancilla. We review state-of-the-art designs for essential arithmetic operations in public-key cryptanalysis such as addition, multiplication, and modular exponentiation. We also present an overview of the techniques used for fault-tolerant runtime and resource estimation in quantum cryptanalysis. In brief, this chapter emphasizes strategies for designing resource-efficient quantum arithmetic circuits, providing a basis for realistic evaluations of quantum cryptanalytic capabilities.
Abstract Efficient quantum comparators are a key building block in quantum algorithms, but their practical utilization during the Noisy Intermediate-Scale Quantum (NISQ) era is limited by high resource demands. In this paper, we present an automated and scalable approach focused on the synthesis of optimal n-bit quantum comparator circuits that significantly minimize key quantum parameters, namely quantum cost (QC), quantum delay (QD), and garbage outputs (GO). Our approach uses a dynamic algorithmic framework built with Python and Qiskit to adapt the circuit design based on the size of the input operands. This enables the automatic generation of resource-efficient, modular designs. Through systematic optimization of qubit assignment, gate ordering, and sub-circuit composition, our full circuit achieves substantial performance gains. Experimental validation using 4-bit comparators demonstrates 14.89% reduction in QC, 12.5% in QD, and 18.75% in GO over state-of-art designs, as validated through noise-free simulations under NISQ-era limitations. Although the algorithmic scalability of the produced circuits allows straightforward generalization to any n-bit operands without any loss in optimization quality. These findings confirm the effectiveness of our approach, suggesting that it may lead to further optimizations for related quantum circuits, including as Arithmetic Logic Units.
One of the main concerns in the era of noisy intermediate-scale quantum (NISQ) computing and fault-tolerant quantum computing is the optimization of circuit implementation for quantum oracles, particularly with limited resources. Synthesizing a satisfiability (SAT) oracle, a crucial component in solving SAT problems, presents a significant challenge. The current state-of-the-art implementation of anm-clause SAT-oracle necessitates2m−1ancillary qubits and a linear number of elementary gates. We develop two efficient and ancilla-adjustable synthesis algorithms to reduce the overall quantum resource usage. Our first quantum oracle algorithm achieves quadratic optimization in the number of ancillary qubits with merely eight times increased circuit size. We also show that using only three ancillary qubits with quadratic circuit size expansion is enough. Our second algorithm optimizes the circuit depth of the SAT oracle toO~(logm)usingmancillary qubits. By running our algorithms on classical intractable SAT instances featured in SAT competitions, the experiment results show that our required quantum resources align well with our theoretical analysis. Our algorithms highlight the scalability of SAT-oracle-based algorithms in near-term quantum devices, such as Grover’s algorithm.