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RESOURCE EFFICIENT DESIGN OF QUANTUM CIRCUITS FOR CRYPTANALYSIS AND SCIENTIFIC COMPUTING APPLICATIONS

Edgard Muñoz‐Coreas

Published Aug 26, 2020• 1 citation
Publisher

Abstract

Quantum computers offer the potential to extend our abilities to tackle computational problems in fields such as number theory, encryption, search and scientific computation. Up to a superpolynomial speedup has been reported for quantum algorithms in these areas. Motivated by the promise of faster computations, the development of quantum machines has caught the attention of both academics and industry researchers. Quantum machines are now at sizes where implementations of quantum algorithms or their components are now becoming possible. In order to implement quantum algorithms on quantum machines, resource efficient circuits and functional blocks must be designed. In this work, we propose quantum circuits for Galois and integer arithmetic. These quantum circuits are necessary building blocks to realize quantum algorithms. The design of resource efficient quantum circuits requires the designer takes into account the gate cost, quantum bit (qubit) cost, depth and garbage outputs of a quantum circuit. Existing quantum machines do not have many qubits meaning that circuits with high qubit cost cannot be implemented. In addition, quantum circuits are more prone to errors and garbage output removal adds to overall cost. As more gates are used, a quantum circuit sees an increased rate of failure. Failures and error rates can be countered by using quantum error correcting codes and fault tolerant implementations of universal gate sets (such as Clifford+T gates). However, Clifford+T gates are costly to implement with the T gate being significantly more costly than the Clifford gates. As a result, designers working with Clifford+T gates seek to minimize the number of T gates (T-count) and the depth of T gates (T-depth). In this work, we propose quantum circuits for Galois and integer arithmetic with lower T-count, T-depth and qubit cost than existing work. This work presents novel quantum circuits for squaring and exponentiation over binary extension fields (Galois fields of form GF(2 m )). The proposed circuits are shown to have lower depth, qubit and gate cost to existing work. We also present quantum circuits for the core operations of multiplication and division which enjoy lower T-count, T-depth and qubit costs compared to existing work. This work also illustrates the design of a T-count and qubit cost efficient design for the square root. This work concludes with an illustration of how the arithmetic circuits can be combined into a functional block to implement quantum image processing algorithms.

DOI
10.13023/etd.2020.365

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Tutorials

Quantum computers offer the potential to extend our abilities to tackle computational problems in fields such as number theory, encryption, search and scientific computation.Up to a superpolynomial speedup has been reported for quantum algorithms in these areas.Motivated by the promise of faster computations, the development of quantum machines has caught the attention of both academics and industry researchers.Quantum machines are now at sizes where implementations of quantum algorithms or their components are now becoming possible.In order to implement quantum algorithms on quantum machines, resource efficient circuits and functional blocks must be designed.This tutorial will cover the following:

IEEE International Symposium on Smart Electronic Systems (iSES)•Dec 1, 2022•0 citations

T-count and Qubit Optimized Quantum Circuit Designs of Carry Lookahead Adder

Himanshu Thapliyal, Edgard Muñoz‐Coreas, Vladislav Khalus

Quantum circuits of arithmetic operations such as addition are needed to implement quantum algorithms in hardware. Quantum circuits based on Clifford+T gates are used as they can be made tolerant to noise. The tradeoff of gaining fault tolerance from using Clifford+T gates and error correcting codes is the high implementation overhead of the T gate. As a result, the T-count performance measure has become important in quantum circuit design. Due to noise, the risk for errors in a quantum circuit computation increases as the number of gate layers (or depth) in the circuit increases. As a result, low depth circuits such as quantum carry lookahead adders (QCLA)s have caught the attention of researchers. This work presents two QCLA designs each optimized with emphasis on T-count or qubit cost respectively. In-place and out-of-place versions of each design are shown. The proposed QCLAs are compared against the existing works in terms of T-count. The proposed QCLAs for out-of-place addition achieve average T gate savings of $54.34 \%$ and $37.21 \%$, respectively. The proposed QCLAs for in-place addition achieve average T gate savings of $72.11 \%$ and $35.87 \%$

arXiv:2004.01826•Apr 4, 2020•6 citations

Improving the number of T gates and their spread in integer multipliers on quantum computing

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Quantum computers offer the potential to extend our abilities to tackle computational problems in fields such as number theory, encryption, search and scientific computation. Up to a superpolynomial speedup has been reported for quantum algorithms in these areas. Motivated by the promise of faster computations, the development of quantum machines has caught the attention of both academics and industry researchers. Quantum machines are now at sizes where implementations of quantum algorithms or their components are now becoming possible. In order to implement quantum algorithms on quantum machines, resource efficient circuits and functional blocks must be designed. In this work, we propose quantum circuits for Galois and integer arithmetic. These quantum circuits are necessary building blocks to realize quantum algorithms. The design of resource efficient quantum circuits requires the designer takes into account the gate cost, quantum bit (qubit) cost, depth and garbage outputs of a quantum circuit. Existing quantum machines do not have many qubits meaning that circuits with high qubit cost cannot be implemented. In addition, quantum circuits are more prone to errors and garbage output removal adds to overall cost. As more gates are used, a quantum circuit sees an increased rate of failure. Failures and error rates can be countered by using quantum error correcting codes and fault tolerant implementations of universal gate sets (such as Clifford+T gates). However, Clifford+T gates are costly to implement with the T gate being significantly more costly than the Clifford gates. As a result, designers working with Clifford+T gates seek to minimize the number of T gates (T-count) and the depth of T gates (T-depth). In this work, we propose quantum circuits for Galois and integer arithmetic with lower T-count, T-depth and qubit cost than existing work. This work presents novel quantum circuits for squaring and exponentiation over binary extension fields (Galois fields of form GF(2 m )). The proposed circuits are shown to have lower depth, qubit and gate cost to existing work. We also present quantum circuits for the core operations of multiplication and division which enjoy lower T-count, T-depth and qubit costs compared to existing work. This work also illustrates the design of a T-count and qubit cost efficient design for the square root. This work concludes with an illustration of how the arithmetic circuits can be combined into a functional block to implement quantum image processing algorithms.
Quantum circuits for arithmetic functions over Galois fields such as squaring are required to implement quantum cryptanalysis algorithms. Quantum circuits for integer arithmetic such as multiplication are required to implement scientific computing algorithms and quantum image processing algorithms on quantum computers. Reliable quantum circuits require error correcting codes and gates that are fault tolerant in nature. Quantum circuits of many qubits are challenging to implement making designs with low qubit cost desirable. In this work, we present quantum arithmetic circuits for applications in quantum cryptanalysis and quantum image processing. We present a proposed algorithm for synthesizing gate cost, qubit cost and depth optimized Galois field (GF(2m)) squaring circuits for quantum cryptanalysis applications. In addition, these squaring circuits are incorporated into a proposed quantum circuit for inversion in GF(2m). This work also presents a proposed quantum integer conditional addition circuit and a quantum integer multiplication circuit optimized for T-count and qubit cost. The quantum conditional addition circuit and quantum multiplier are incorporated into proposed quantum circuits for bilinear interpolation optimized for T-count cost that can be used in quantum image processing applications.
Quantum square root operation is a useful building block in implementing important quantum algorithms such as the Harrow–Hassidim–Lloyd (HHL) algorithm, algorithms in physics and quantum chemistry, and also used in computing roots of quadratic equation, evaluating quadratic congruence, solving Hamiltonian and Poisson equations, trigonometric functions, computing logarithm and fractional exponent, and in quantum chemistry [1]–[5]. Quantum circuits could be made fault-tolerant by using error correcting codes and fault-tolerant quantum gates (such as the Clifford + T-gates). However, The T-gates are expensive to implement than other fault-tolerant gates (such as Clifford+T gates) [6] [7]. Therefore, quantum circuits with low T-count and qubit cost is preferred. In this paper, we present a novel quantum square root architecture optimized for T-count and Qubit cost that produces no garbage outputs. The proposed square root circuit accepts integer and fractional inputs. We use the Babylonian method to calculate the square root. To reduce the number of iteration, the initial guess required in the Babylonian method is calculated from the integer square root circuit in [8] which reduces the cost measures. To further save the cost, we use the resource efficient non-restoring division circuit shown in [9] and quantum adder shown in [6]. The proposed quantum square root circuit sees an asymptotic reduction of 95.84% in T-count and 88.89% in Qubit cost with respect to Bhaskar et al. [1]. With respect to Dutta et al. [10] the design sees an asymptotic reduction of 96% in T-count, and 88.89% in Qubit cost.
Arithmetic operations are an important component of many quantum algorithms. Optimizing quantum circuits for these operations therefore leads to more efficient implementations of the corresponding algorithms. In this paper, we develop new fault-tolerant quantum circuits for various integer division algorithms (both reversible and non-reversible). These circuits, when implemented in the Clifford+T gate set, achieve improvements in the asymptotic T-count and CNOT-count from O(n2)O(n^2)O(n2) to O(nm)O(nm)O(nm), and in the asymptotic T-depth from O(n2)O(n^2)O(n2) to O(nlog⁡m)O(n \log m)O(nlogm), where nnn and mmm are the bit lengths of the dividend and divisor, respectively. The qubit counts are significantly lower than those in previous works. We achieve this through careful modifications of the division algorithms and by expressing them in terms of a primitive we call COMP-N-SUB that compares two integers and conditionally subtracts them. We show that this primitive can be implemented at a cost, in terms of both Clifford and non-Clifford gates, comparable to that of one addition. By contrast, performing comparison and conditional subtraction separately would cost roughly as much as a controlled addition plus a regular addition.
Quantum computers offer the potential to extend our abilities to tackle computational problems in fields such as number theory, encryption, search and scientific computation.Up to a superpolynomial speedup has been reported for quantum algorithms in these areas.Motivated by the promise of faster computations, the development of quantum machines has caught the attention of both academics and industry researchers.Quantum machines are now at sizes where implementations of quantum algorithms or their components are now becoming possible.In order to implement quantum algorithms on quantum machines, resource efficient circuits and functional blocks must be designed.This tutorial will cover the following:
Quantum circuits of arithmetic operations such as addition are needed to implement quantum algorithms in hardware. Quantum circuits based on Clifford+T gates are used as they can be made tolerant to noise. The tradeoff of gaining fault tolerance from using Clifford+T gates and error correcting codes is the high implementation overhead of the T gate. As a result, the T-count performance measure has become important in quantum circuit design. Due to noise, the risk for errors in a quantum circuit computation increases as the number of gate layers (or depth) in the circuit increases. As a result, low depth circuits such as quantum carry lookahead adders (QCLA)s have caught the attention of researchers. This work presents two QCLA designs each optimized with emphasis on T-count or qubit cost respectively. In-place and out-of-place versions of each design are shown. The proposed QCLAs are compared against the existing works in terms of T-count. The proposed QCLAs for out-of-place addition achieve average T gate savings of 54.34%54.34 \%54.34% and 37.21%37.21 \%37.21%, respectively. The proposed QCLAs for in-place addition achieve average T gate savings of 72.11%72.11 \%72.11% and 35.87%35.87 \%35.87%
Quantum circuits performing arithmetic operations are critical in quantum computing because of the need for such operations in proven quantum algorithms. Although quantum computers are becoming increasingly resourceful, the number of qubits currently available is still limited. Furthermore, these qubits are heavily affected by internal and external noise. It has been proven that quantum circuits built using Clifford +T+T+T gates can be made fault tolerant. However, the use of the TTT gates comes at a very high cost. If the number of TTT gates used in a circuit is not optimized, the cost of the circuit will be increased excessively. As a consequence, it is essential to optimize the circuits so that they are as resource efficient as possible and also noise tolerant. This paper presents the design of a circuit to perform the multiplication of two integers. The circuit is built using only Clifford +T+T+T gates for compatibility with error detection and correction codes. It outperforms the circuits in the state of the art in terms of TTT count and TTT depth.