The advances in quantum hardware with functional quantum processors integrating tens of noisy qubits, together with the availability of near-term quantum algorithms have allowed the development of the so-called full-stacks that bridge quantum applications with quantum devices. In this talk, we will provide an overview of the different layers of the quantum computing full-stack, with emphasis on the software ones that include the compilation of quantum algorithms. We will then discuss the need for optimal physical-aware and algorithm-driven compilation techniques in the midst of the NISQ (Noisy Intermediate-scale quantum) era. We will also focus on key principles for architecting quantum computers such as codesign, optimization and benchmarking and illustrate how the use of structured design space exploration methodologies could help towards the development of a cross-layer codesign framework for full-stack quantum computing systems. Finally, we will talk about the scalability of quantum computing systems, which is one of the main challenges the quantum computing community is currently facing.
The advances in quantum hardware with functional quantum processors integrating tens of noisy qubits, together with the availability of near-term quantum algorithms have allowed the development of the so-called full-stacks that bridge quantum applications with quantum devices. In this talk, we will provide an overview of the different layers of the quantum computing full-stack, with emphasis on the software ones that include the compilation of quantum algorithms. We will then discuss the need for optimal physical-aware and algorithm-driven compilation techniques in the midst of the NISQ (Noisy Intermediate-scale quantum) era. We will also focus on key principles for architecting quantum computers such as codesign, optimization and benchmarking and illustrate how the use of structured design space exploration methodologies could help towards the development of a cross-layer codesign framework for full-stack quantum computing systems. Finally, we will talk about the scalability of quantum computing systems, which is one of the main challenges the quantum computing community is currently facing.
The progress in developing quantum hardware with functional quantum processors integrating tens of noisy qubits, together with the availability of near-term quantum algorithms has led to the release of the first quantum computers. These quantum computing systems already integrate different software and hardware components of the so-called “full-stack”, bridging quantum applications to quantum devices. In this paper, we will provide an overview on current full-stack quantum computing systems. We will emphasize the need for tight co-design among adjacent layers as well as vertical cross-layer design to extract the most from noisy intermediate-scale quantum (NISQ) processors which are both error-prone and severely constrained in resources. As an example of co-design, we will focus on the development of hardware-aware and algorithm-driven compilation techniques.
Building a quantum computer is not only about having qubits or quantum processors, analogously to classical computers are not only based on transistors or integrated circuits. Accordingly, in the very recent times, a few unique research groups in academia and companies have been exploring and proposing high-level and low-level programming languages, compilers, microarchitecture and instruction set architectures for quantum computation as well as different computer architecture approaches. In other words, developing a quantum computer requires bridging quantum applications and quantum devices. This talk will address the main challenges of building a scalable full-stack quantum computing system followed by a discussion on its architecture focusing on fault tolerance and compilation of quantum algorithms on NISQ devices. I will also provide my vision on how the research community could accelerate the process towards building such a scalable quantum machine, potentially through vertical cross-layer co-design structured methodologies.
In recent years, Quantum Computing (QC) has progressed to the point where small working prototypes are available for use. Termed Noisy Intermediate-Scale Quantum (NISQ) computers, these prototypes are too small for large benchmarks or even for Quantum Error Correction, but they do have sufficient resources to run small benchmarks, particularly if compiled with optimizations to make use of scarce qubits and limited operation counts and coherence times. QC has not yet, however, settled on a particular preferred device implementation technology, and indeed different NISQ prototypes implement qubits with very different physical approaches and therefore widely-varying device and machine characteristics. Our work performs a full-stack, benchmark-driven hardware-software analysis of QC systems. We evaluate QC architectural possibilities, software-visible gates, and software optimizations to tackle fundamental design questions about gate set choices, communication topology, the factors affecting benchmark performance and compiler optimizations. In order to answer key cross-technology and cross-platform design questions, our work has built the first top-to-bottom toolflow to target different qubit device technologies, including superconducting and trapped ion qubits which are the current QC front-runners. We use our toolflow, TriQ, to conduct {\em real-system} measurements on 7 running QC prototypes from 3 different groups, IBM, Rigetti, and University of Maryland. From these real-system experiences at QC's hardware-software interface, we make observations about native and software-visible gates for different QC technologies, communication topologies, and the value of noise-aware compilation even on lower-noise platforms. This is the largest cross-platform real-system QC study performed thus far; its results have the potential to inform both QC device and compiler design going forward.
The transition from noisy intermediate-scale quantum (NISQ) processors to large-scale fault-tolerant machines requires more than incremental improvements in physical qubit fidelity. While advances in quantum error correction (QEC) theory continue to lower the theoretical overhead of quantum computing, much of this research remains abstracted from the physical realities of qubit implementations. This disconnect often results in hardware-agnostic designs that are inefficient or impractical to build. In this dissertation, I identify three primary gaps between theoretical QEC research and practical hardware: (1) the high levels of noise and temporal instability in experimental devices that impede scalable QEC; (2) the prohibitively large qubit and time costs of useful algorithms, driven largely by the limitations of the standard surface code; and (3) the failure of current resource estimates to account for hardware-level constraints, such as limited connectivity and the complexity of implementing non-local operations. To bridge these gaps, I propose a holistic, cross-stack approach where the error correction protocols and the physical hardware are designed in concert. By developing realistic device models and hardware-aware solutions at the lowest levels of the software stack, we can accelerate the path toward functional fault-tolerance. I present my work across three research thrusts: first, leveraging codesign to mitigate hardware-specific noise and reduce physical error rates; second, developing software tools for fault-tolerant quantum computers to reduce the space-time overhead of the QEC layer; and third, proposing two novel hardware-aware QEC architectures that provide practical, high-performance routes to scalable quantum computation.
Design, simulation, analysis and verification methodologies are crucial for developing electronic circuits and systems at large. Whereas long-standing EDA software is used in the semiconductor technology, there is no counterpart for quantum computing systems yet. Although the quantum computing community started utilizing and adapting some of the already existing EDA tools, for instance, to design quantum processors and control electronics for driving the qubits, or even to solve some quantum computing design tasks, they do not fully use the expertise gained over the last decades in the field of design automation. Current intermediate-scale quantum computers have been designed in an ‘adhoc’ manner with heterogeneous methods and tools. As we are entering the large-scale era, it is timely and key to further adopt EDA methodologies and software for quantum computing. In this paper, we provide an overview on how full-stack quantum computing systems are being implemented nowadays and discuss which the main challenges are for transitioning from this current scenario to a comprehensive framework encompassing full automated system-wide architecting, design, simulation, verification, and test.
Quantum computing has progressed from early demonstrations across superconducting, trapped ion, photonic, and spin-based platforms to increasingly integrated systems. However, transitioning from the noisy intermediate-scale quantum (NISQ) era to robust, fault tolerant implementations remain a central challenge. This paper presents a systematic review and synthesis of practical quantum computing, encompassing experimental advances, integrated photonics, error correction breakthroughs, software stack evolution, benchmarking practices, algorithmic readiness, and socio-technical dimensions. We critically assess current limitations and highlight emerging directions, including integrated photonic modules with high fidelity interconnects, real time decoders for surface code logical qubits, and hardware aware compiler strategies. Our analysis is grounded in peer-reviewed experimental data and model-based evaluations. Key findings include demonstrated logical error suppression via increased code distance, scalable photonic module prototypes, and refined resource estimates for cryptanalytic and simulation tasks. This paper concludes with a structured research agenda for 2025–2030, proposing four priority thrusts such as hardware QEC co design, reproducible cross platform benchmarking, modular/distributed architectures, and quantum networking with governance frameworks. This evidence based roadmap aims to align researchers and practitioners toward actionable milestones on the path to practical quantum computing.