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Progress Overview of Superconducting Quantum Chip Based on Josephson Junction

YU Xuan,LU Xin,XI Jun,SHAO Peinan

Published Dec 1, 2018• 0 citations
Publisher

Abstract

Superconducting quantum computers have the advantages of mature chip processing technology,high system integration,and good scalability.However,superconducting quantum computing needs to increase the quantum integration of chips and ensure decoherence time of quantum chips to achieve fault-tolerant quantum computing.The advancement of superconducting quantum chips is analyzed,and the physical mechanism,advantages and disadvantages of superconducting quantum bus are presented,and several basic quantum bits characteristics are studied.The coupling scheme is discussed between superconducting qubits,including local and non-local coupling.Analysis results on mainstream expansion and layout schemes in recent years show that quantum algorithm programming is suitable for one-dimensional or two-dimensional arrays,while maximum entanglement and full coupling use wraparound expansion schemes to achieve large-scale,high-efficiency quantum to provied an idea for the design of the computational chip.

DOI
10.19678/j.issn.1000-3428.0051917

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Superconducting quantum computers have the advantages of mature chip processing technology,high system integration,and good scalability.However,superconducting quantum computing needs to increase the quantum integration of chips and ensure decoherence time of quantum chips to achieve fault-tolerant quantum computing.The advancement of superconducting quantum chips is analyzed,and the physical mechanism,advantages and disadvantages of superconducting quantum bus are presented,and several basic quantum bits characteristics are studied.The coupling scheme is discussed between superconducting qubits,including local and non-local coupling.Analysis results on mainstream expansion and layout schemes in recent years show that quantum algorithm programming is suitable for one-dimensional or two-dimensional arrays,while maximum entanglement and full coupling use wraparound expansion schemes to achieve large-scale,high-efficiency quantum to provied an idea for the design of the computational chip.
The superconducting qubit quantum computer is one of the most promising quantum computing architectures for large-scale integration due to its maturity and close proximity to the well-established semiconductor manufacturing infrastructure. From an education perspective, it also bridges classical microwave electronics and quantum electrodynamics. In this paper, we will review the basics of quantum computers, superconductivity, and Josephson junctions. We then introduce important technologies and concepts related to DiVincenzo's criteria, which are the necessary conditions for the superconducting qubits to work as a useful quantum computer. Firstly, we will discuss various types of superconducting qubits formed with Josephson junctions, from which we will understand the trade-off across multiple design parameters, including their noise immunity. Secondly, we will discuss different schemes to achieve entanglement gate operations, which are a major bottleneck in achieving more efficient fault-tolerant quantum computing. Thirdly, we will review readout engineering, including the implementations of the Purcell filters and quantum-limited amplifiers. Finally, we will discuss the nature and review the studies of two-level system defects, which are currently the limiting factor of qubit coherence time. DiVincenzo's criteria are only the necessary conditions for a technology to be eligible for quantum computing. To have a useful quantum computer, large-scale integration is required. We will review proposals and developments for the large-scale integration of superconducting qubit devices. By comparing with the application of electronic design automation (EDA) in semiconductors, we will also review the use of EDA in superconducting qubit quantum computer design, which is necessary for its large-scale integration.
Superconducting quantum circuits (SQCs), composed of superconducting capacitors, inductances, Josephson junctions, and transmission lines, exhibit macroscopic quantum effects at ultra-low temperatures. Due to the extremely low dissipation of superconductors, an important application of SQCs is superconducting qubits with long coherence time. Quantum computing based on superconducting qubits is a leading physical realization method of quantum computing, which is theoretically capable of accelerating many computational problems including quantum simulation, database searching, and optimization. In the long run, to use the power of quantum computing to its full extent, universal quantum computers should be constructed with quantum error correction. In the short term, one of the most pressing targets of the superconducting quantum computing community is to demonstrate quantum advantage using noisy intermediate-scale quantum chips. Both goals rely on the increasing of the number of coupled qubits in a quantum circuit and the quality of these qubits, which dictate the breadth and the depth of a problem it can solve, respectively. The fabrication of SQCs has adopted a few manufacturing processes from conventional integrated circuits. Quantum chips containing multiple superconducting qubits can be made and packaged on a large scale. “Quantum supremacy” has been demonstrated on a quantum chip with fifty-three qubits fabricated using the flip-chip bonding technology. However, to demonstrate quantum advantage, the quality and quantity of qubits need to increase simultaneously. Dissipative channels emerge in circuit design, material preparation, chip fabrication, and working environment, limiting the lifetime of superconducting qubits. For quantum chips with tens to hundreds of qubits, the integration will also introduce extra processing steps which may degrade the qubits, and unwanted coupling to loss channels. Most of these channels are microscopically related to materials constructing the quantum chips, chip surfaces, and material interfaces. Thus, it is important to investigate the material growth and device fabrication of SQCs, and to understand the material related loss mechanisms. This review paper investigates the material related topics in superconducting quantum circuits pertinent to the quantum computing application from a comprehensive perspective. The history of SQCs is briefly mentioned, followed by the peculiar characteristics as an engineerable quantum system, and a roadmap to quantum advantage and universal quantum computing in the next a few years. Technically, the superconducting quantum computer is compared to a Schrodinger’s cat, and can be boiled down into three parts, i.e., quantum chips, the environment, and the operating system, corresponding to the cat, the box, and the observer, respectively. The material related decoherence channels of the SQCs can be sorted into four categories; each will be discussed in details. To fabricate SQCs with minimal loss, the processing technologies are elaborated, including qubit design, material selection, surface treatments, film growth, and Josephson junction, etc. Though there are general guidelines that amorphous materials should be avoided and processing induced damage should be minimized, more is to be investigated due to the emerging of new materials and new fabrication methods. The last part presents the potential application of the superconducting quantum computer and its current state of play. SQC for quantum computing is a multi-discipline research topic, demanding joint efforts from different scientific and technical areas. Materials science and device processing will play important roles along the way to quantum practicality.
Quantum processing units (QPUs) built on superconducting Josephson junctions remain the most industrially mature route to fault-tolerant quantum computing, but the field has moved substantially since early 2025. This paper provides an updated overview of Josephson-junction QPUs, grounded in the quantum-mechanical principles, superposition, entanglement, and decoherence, that any qubit implementation must contend with, and in the physics of Cooper pairing and quantum tunneling that make a Josephson junction behave as a controllable qubit. We examine the engineering challenges of scaling these devices, including crosstalk, classical control-interface bottlenecks, and quantum error correction, and discuss the first below-threshold surface-code demonstrations on superconducting hardware. We survey recent materials advances, near-term computational results, and applications beyond computing, and compare Josephson-junction QPUs against trapped-ion, photonic, and neutral-atom alternatives, the latter having emerged as a serious fourth architecture since our original analysis. We close with the current public roadmaps toward fault-tolerant superconducting quantum computers and a calibrated assessment of how much progress those roadmaps still require.
With the rapid development of big data, artificial intelligence, Internet of Things and other technologies, quantum computers have emerged. It has unparalleled advantages in the fields of complex problem optimization, physical system simulation and encryption. Among them, superconducting quantum computing has become the mainstream direction of quantum computer development due to its advantages of scalability and process compatibility. However, there is no mature process integration scheme for large-scale quantum computer packaging technology with more than 100 bits. In this paper, for the packaging requirements of general-purpose large-bit superconducting quantum chips, a process simulation study based on the interconnection system of low-temperature superconducting In bumps and Al bonding filaments is carried out. Through the optimization of the interconnection structure of the package box structure, SMA terminals, high-speed substrate and other interconnection structures, the parasitic capacitance-generating structure is localized, electromagnetic leakage patterns are clarified, and a multilevel interconnection scheme with good electromagnetic shielding and low loss is obtained. Optimization of In bump and Al bonding process, the interconnect optimization scheme of substrate slotting and three-wire bonding is obtained, with insertion loss > -ldB and reflection loss >-20dB. The overall insertion loss of the multilevel interconnect structure is > -3dB and reflection loss >-15dB, which meets the demand of high-quality signal transmission. The results of this study demonstrate the quantum chip signal transmission and simulation modeling method, and provide a new idea for the cross-scale finite element electromagnetic simulation of superconducting quantum chips.
Experiments with superconducting quantum processors have successfully demonstrated the basic functions needed for quantum computation and evidence of utility, albeit without a sizable array of error-corrected qubits. The realization of the full potential of quantum computing centers on achieving large scale fault-tolerant quantum computers. Science, engineering and industry advances are needed to robustly generate, sustain, and efficiently manipulate an exponentially large computational (Hilbert) space as well as supply the number and quality components needed for such a scaled system. In this article, we suggest critical areas of quantum system and ecosystem development, with respect to the handling and transmission of quantum information within and out of a cryogenic environment, that would accelerate the development of quantum computers based on superconducting circuits.