Emerging quantum computing technologies are poised to replace standard CMOS logic when the exponential size reduction reaches sub-atomic dimensions. Quantum circuits are reversible and therefore promise the potential of computation without energy loss. This research considers computer aided design (CAD) methods for all major aspects of quantum computing circuit design including logic synthesis, simulation, verification, and testing.
The technologies we investigate include quantum cell automata (QCA) and general quantum circuits (QC), with significantly more emphasis on the later. The recently introduced quantum multi-valued decision diagram (QMDD) provides an efficient method to represent and simulate quantum (and other classical reversible) circuits. A major contribution of this dissertation is the development of a sift-like minimization as well as structure metrics based minimization techniques for QMDD. We have used the enhanced QMDD to efficiently simulate quantum circuits as well as quantum vectors.
Our early investigation of reversible logic is concerned with a virtual implementation that uses a direct translation of relatively complex binary functions into circuits composed of Fredkin reversible gates. This allowed us to project size and speed complexity of complex reversible circuits, although this direct translation approach fails to minimize garbage inputs and outputs. To achieve proper garbage minimization, one must synthesize reversible logic using gate cascades with appropriate optimization methods embedded that attempt to minimize the total number of lines in the circuit. To that end, we developed a novel QMDD-based tool for cascade logic synthesis that utilizes the QMDD minimized variable order for lexicographical synthesis with garbage minimization included as an optimization criterion.
We developed a synthesis tool that investigates the QCA native 3-input majority gates ability to implement complex logic circuits. In particular, we explore the benefit of transforming the logic description into exclusive sum of products (ESOP) forms prior to implementation in the majority gates.
We survey recent efforts in establishing the foundation for QC testing and fault tolerant QC. We project the potential use of random tests as well as built in self test (BIST) techniques for future QC. A major contribution of this dissertation is the investigation of partially redundant reversible logic. Detection of partially redundant logic within any design, reversible or irreversible, has ramifications for logic synthesis, for design verification, and for design for test (DFT) issues.
Emerging quantum computing technologies are poised to replace standard CMOS logic when the exponential size reduction reaches sub-atomic dimensions. Quantum circuits are reversible and therefore promise the potential of computation without energy loss. This research considers computer aided design (CAD) methods for all major aspects of quantum computing circuit design including logic synthesis, simulation, verification, and testing.
The technologies we investigate include quantum cell automata (QCA) and general quantum circuits (QC), with significantly more emphasis on the later. The recently introduced quantum multi-valued decision diagram (QMDD) provides an efficient method to represent and simulate quantum (and other classical reversible) circuits. A major contribution of this dissertation is the development of a sift-like minimization as well as structure metrics based minimization techniques for QMDD. We have used the enhanced QMDD to efficiently simulate quantum circuits as well as quantum vectors.
Our early investigation of reversible logic is concerned with a virtual implementation that uses a direct translation of relatively complex binary functions into circuits composed of Fredkin reversible gates. This allowed us to project size and speed complexity of complex reversible circuits, although this direct translation approach fails to minimize garbage inputs and outputs. To achieve proper garbage minimization, one must synthesize reversible logic using gate cascades with appropriate optimization methods embedded that attempt to minimize the total number of lines in the circuit. To that end, we developed a novel QMDD-based tool for cascade logic synthesis that utilizes the QMDD minimized variable order for lexicographical synthesis with garbage minimization included as an optimization criterion.
We developed a synthesis tool that investigates the QCA native 3-input majority gates ability to implement complex logic circuits. In particular, we explore the benefit of transforming the logic description into exclusive sum of products (ESOP) forms prior to implementation in the majority gates.
We survey recent efforts in establishing the foundation for QC testing and fault tolerant QC. We project the potential use of random tests as well as built in self test (BIST) techniques for future QC. A major contribution of this dissertation is the investigation of partially redundant reversible logic. Detection of partially redundant logic within any design, reversible or irreversible, has ramifications for logic synthesis, for design verification, and for design for test (DFT) issues.
The biggest problems in system design today, and in the future, are the high rate of power consumption, and the emergence of quantum effects for highly dense ICs. The real challenge is to design reliable systems that consume as little power as possible and in which the signals are processed and transmitted at very high speeds with very high signal integrity. Current tools are used to design ICs using only classical design methodologies that apply conventional synthesis constraints such as area, delay, and power.
As it was proven, physical processes have to be logically reversible in order to reduce (theoretically eliminate) power consumption. Logical reversibility requires that one can obtain the vector of inputs from the vector of outputs (i.e., backward process) as well as the vector of outputs from the vector of inputs (i.e., forward process). Since only ad-hoc methods were used previously for the reversible synthesis of logic functions, and since systematic and efficient reversible logic synthesis methodologies were significantly missing from previous literature, this dissertation provides several original contributions to reversible logic synthesis by providing a set of tools that can be systematically used to synthesize and evaluate logic functions using reversible logic. This includes, among other new results, Reversible Lattice Structures, Reversible Modified Reconstructability Analysis, Reversible Nets, Reversible Decision Diagrams, and Reversible Cascades.
To solve the problem of high signal integrity when processing (computing and transmitting) information using extremely high dense circuits one needs to incorporate the physical quantum mechanical effects that are unavoidable in the nano scales. Since quantum circuits are reversible, and since many of the underlying theorems and formalisms for multiple-valued quantum computing were significantly missing from previous literature, new fundamental foundations for such computations had to be established. These new results include, but not limited to, Quantum Chrestenson Operator, new types of Quantum Decision Trees and Quantum Decision Diagrams as efficient representations for quantum computing, new Composite Basis States, new multiple-valued Einstein-Podolsky-Rosen (EPR) Basis States, and new classes of quantum primitives.
Initial evaluations and conclusions for the comparative advantages and disadvantages of the new reversible and quantum computing methodologies are also provided.
Quantum mechanics is the revolution in thinking of the 20th century and will be the revolution in various applications in the 21st century. The world's powers-that-be each have their own particular or common quantum plans to access these new technologies. Indeed, emerging quantum computing technologies are poised to replace classical binary logic. The development of new integrated operators, on subatomic circuits, will benefit from an exponential reduction in size, power consumption and fantastic computing capacity. Indeed, the quantum circuit is proving day by day a very high level of numerical computation disrupting communication, encryption and modelling algorithms. However, what about the reversibility of quantum operators in order to adapt them to our already widely used classical computers?Current design flows will be challenged at various levels both in terms of computer-aided design (CAD) methods and in all major aspects of quantum computing circuit design, including logic synthesis, simulation, verification and testing. On the other hand, quantum technology remains dependent on access to integrated photonics and probably on the integration of algorithms in hyper-flexible photon electron hardware. Our paper intends to present the possibility of designing classical operators based on quantum operators in order to explain and explore the mixed Qbit-Bit Using the IBM simulator, to analyse their functions, to design new electronic functions and to implement them in quantum circuits.
Reversible logic is emerging as a promising computing paradigm with applications in ultralow power nanocomputing and emerging nanotechnologies such as quantum computing, quantum dot cellular automata (QCA), optical computing, etc. Reversible circuits are similar to conventional logic circuits except that they are built from reversible gates. In reversible gates, there is a unique, one-to-one mapping between the inputs and outputs, not the case with conventional logic. One of the primary motivations for adopting reversible logic lies in the fact that it can provide a logic design methodology for designing ultra-low power circuits beyond KTln2 limit for those emerging nanotechnologies in which the energy dissipated due to information destruction will be a significant factor of the overall heat dissipation. Further, logic circuits for quantum computers must be built from reversible logic components. Several important metrics need to be considered in the design of reversible circuits the importance of which needs to be discussed. Quantum computers of many qubits are extremely difficult to realize thus the number of qubits in the quantum circuits needs to be minimized. This sets the major objective of optimizing the number of ancilla inputs and the number of the garbage outputs in the reversible logic based quantum circuits. The constant input in the reversible quantum circuit is called the ancilla input, while the garbage output refers to the output which exists in the circuit just to maintain one-to-one mapping but is not a primary or a useful output. The reversible circuit has other important parameters of quantum cost and delay which need to be optimized.
The reversible logic has promising applications in emerging computing paradigms, such as quantum computing, quantum dot cellular automata, optical computing, etc. In reversible logic gates, there is a unique one-to-one mapping between the inputs and outputs. To generate a useful gate function, the reversible gates require some constant ancillary inputs called ancilla inputs. Also to maintain the reversibility of the circuits some additional unused outputs are required that are referred to as the garbage outputs. The number of ancilla inputs, the number of garbage outputs and quantum cost plays an important role in the evaluation of reversible circuits. Thus minimizing these parameters are important for designing an efficient reversible circuit. Reversible circuits are of highest interest in optical computing, quantum dot cellular automata and quantum computing. The quantum gates perform an elementary unitary operation on one, two or more two-state quantum systems called qubits. Any unitary operation is reversible in nature, and hence, quantum networks are also reversible, to conclude the quantum computers must be built from reversible logic components. The main contribution of this dissertation is the design exploration and application of reversible circuits in emerging nanotechnologies. The emerging technologies explored in this work are 1) Optical quantum computing 2) Quantum computing. The first contribution of this dissertation is Mach-Zehnder interferometer based design of all optical reversible binary adder. The all optical reversible adder design is based on two new optical reversible gates referred as optical reversible gate I (ORG-I) and optical reversible gate II (ORG-II) and the existing all optical Feynman gate. The two new reversible gates ORG-I and ORGI-II have been proposed and can implement a reversible adder with a reduced optical cost which is equal to the number of MZI switches required, less propagation delay, and with zero overhead in terms of number of ancilla inputs and the garbage outputs. The proposed all optical reversible adder design based on the ORG-I and ORG-II reversible gates are compared and shown to be better than the other existing designs of reversible adder proposed in the non-optical domain in terms of number of MZI switches, delay, the number of ancilla inputs and the garbage outputs. The proposed all optical reversible adder will be a key component of an all optical reversible arithmetic logical unit (ALU), that is a quite essential component in a wide variety of optical signal processing applications. In the existing literature, the NAND logic based implementation is the only known implementation available for reversible gates and its functions. There is a lack of research in the direction of NOR logic based implementation of reversible gates and functions. The second contribution of this dissertation is the design of NOR logic based n-input and n-output reversible gates, one of which can be efficiently mapped into optical computing using the Mach-Zehnder interferometer (MZI), while the other can be mapped efficiently in optical computing using the linear optical quantum gates. The proposed reversible NOR gates work as a corresponding NOR counterpart of NAND logic based Toffoli gates. The proposed optical reversible NOR logic gates can implement the reversible boolean logic functions with less number of linear optical quantum logic gates with reduced optical cost and propagation delay compared to the implementation using existing optical reversible NAND gates. It is illustrated that an optical reversible gate library having both optical Toffoli gate and the proposed optical reversible NOR gate is superior compared to the library containing only the optical Toffoli gate: (i) in terms of number of linear optical quantum gates when implemented using linear optical quantum computing (LOQC), (ii) in terms of optical cost and delay when implemented using the Mach-Zehnder interferometer. The third contribution of this dissertation is a binary tree-based design methodology for a NxN reversible multiplier. The proposed binary tree-based design methodology for a NxN reversible multiplier performs the addition of partial products in parallel using the reversible ripple adders with zero ancilla bit and zero garbage bit; thereby, minimizing the number of ancilla and garbage bits used in the design. The proposed design methodology shows improvements in terms of number of ancilla inputs and garbage outputs compared to all the existing reversible multiplier designs. The methodology is also extended to the design of NxN reversible signed multiplier based on modified Baugh-Wooley multiplication methodology.
Research on reversible circuits has gained significance due to its application in quantum computations and many further areas such as the design of encoders. At the same time, the use of multiple-valued logic gained importance since this reduces the number of required entities in physical systems (e.g. in a future quantum computer). While most research is still conducted in the Boolean domain, there exist only few approaches which realize reversible circuits for multiple-valued logic. Moreover, most of the previously proposed solutions for synthesis of multiple-valued reversible circuits are not scalable and consider ternary (i.e. 3-valued circuits) only. Instead of overcoming these issues by developing new synthesis approaches for multiple-valued reversible circuits from scratch, we propose to utilize the recent accomplishments in the design of Boolean reversible circuits and to generalize them for multiple-valued logic. To this end, we discuss how to generalize Quantum Multiple-valued Decision Diagram based (QMDD-based) synthesis - a synthesis approach for Boolean reversible circuits which has been proven to be scalable and which has been used in several recently developed design flows. The discussions eventually show how to bridge the development gap between Boolean and multiple-valued logic for reversible circuits.
Background/Objectives: The objective is to reduce the Quantum Cost (QC), Garbage Output (GO) and Gate Counts in the design of the adder by incorporating the Novel Reversible Gates. Methods/Statistical Analysis: In recent day’s energy dissipation is the major complex problem in circuit designing in order to recede this problem the reversible logic is employed, where the input vectors can be derived from the output vectors and from the output vectors the input vectors can be procured. Using this technique the Quantum Cost, Garbage Outputs and Gate Counts of the design is reduced. Findings: Based on the technique of reversible logic a novel reversible Gates is proposed from that the novel reversible adders have been designed. The novel reversible gates satisfy the property of reversibility and universality which shows the uniqueness of the proposed gates. The comparative analysis have been made with the existing work, the proposed work shows a significant improvement in the design optimization parameters. Application/Improvements: The proposed structures can be employed in the ALU design and in Floating Point Multiplier design. The comparative analysis shows that Number of Gates, Garbage Outputs and Quantum Cost is minimum for the proposed gate based structure rather than conventional one Keywords: Garbage Outputs (GO), QCA, Quantum Cost (QC), Reversibility, Reversible Logic, Universality.