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Design Exploration and Application of Reversible Circuits in Emerging Technologies

Saurabh Kotiyal

Published Jan 1, 2016• 2 citations
OpenAlex

Abstract

The reversible logic has promising applications in emerging computing paradigms, such as quantum computing, quantum dot cellular automata, optical computing, etc. In reversible logic gates, there is a unique one-to-one mapping between the inputs and outputs. To generate a useful gate function, the reversible gates require some constant ancillary inputs called ancilla inputs. Also to maintain the reversibility of the circuits some additional unused outputs are required that are referred to as the garbage outputs. The number of ancilla inputs, the number of garbage outputs and quantum cost plays an important role in the evaluation of reversible circuits. Thus minimizing these parameters are important for designing an efficient reversible circuit. Reversible circuits are of highest interest in optical computing, quantum dot cellular automata and quantum computing. The quantum gates perform an elementary unitary operation on one, two or more two-state quantum systems called qubits. Any unitary operation is reversible in nature, and hence, quantum networks are also reversible, to conclude the quantum computers must be built from reversible logic components. The main contribution of this dissertation is the design exploration and application of reversible circuits in emerging nanotechnologies. The emerging technologies explored in this work are 1) Optical quantum computing 2) Quantum computing. The first contribution of this dissertation is Mach-Zehnder interferometer based design of all optical reversible binary adder. The all optical reversible adder design is based on two new optical reversible gates referred as optical reversible gate I (ORG-I) and optical reversible gate II (ORG-II) and the existing all optical Feynman gate. The two new reversible gates ORG-I and ORGI-II have been proposed and can implement a reversible adder with a reduced optical cost which is equal to the number of MZI switches required, less propagation delay, and with zero overhead in terms of number of ancilla inputs and the garbage outputs. The proposed all optical reversible adder design based on the ORG-I and ORG-II reversible gates are compared and shown to be better than the other existing designs of reversible adder proposed in the non-optical domain in terms of number of MZI switches, delay, the number of ancilla inputs and the garbage outputs. The proposed all optical reversible adder will be a key component of an all optical reversible arithmetic logical unit (ALU), that is a quite essential component in a wide variety of optical signal processing applications. In the existing literature, the NAND logic based implementation is the only known implementation available for reversible gates and its functions. There is a lack of research in the direction of NOR logic based implementation of reversible gates and functions. The second contribution of this dissertation is the design of NOR logic based n-input and n-output reversible gates, one of which can be efficiently mapped into optical computing using the Mach-Zehnder interferometer (MZI), while the other can be mapped efficiently in optical computing using the linear optical quantum gates. The proposed reversible NOR gates work as a corresponding NOR counterpart of NAND logic based Toffoli gates. The proposed optical reversible NOR logic gates can implement the reversible boolean logic functions with less number of linear optical quantum logic gates with reduced optical cost and propagation delay compared to the implementation using existing optical reversible NAND gates. It is illustrated that an optical reversible gate library having both optical Toffoli gate and the proposed optical reversible NOR gate is superior compared to the library containing only the optical Toffoli gate: (i) in terms of number of linear optical quantum gates when implemented using linear optical quantum computing (LOQC), (ii) in terms of optical cost and delay when implemented using the Mach-Zehnder interferometer. The third contribution of this dissertation is a binary tree-based design methodology for a NxN reversible multiplier. The proposed binary tree-based design methodology for a NxN reversible multiplier performs the addition of partial products in parallel using the reversible ripple adders with zero ancilla bit and zero garbage bit; thereby, minimizing the number of ancilla and garbage bits used in the design. The proposed design methodology shows improvements in terms of number of ancilla inputs and garbage outputs compared to all the existing reversible multiplier designs. The methodology is also extended to the design of NxN reversible signed multiplier based on modified Baugh-Wooley multiplication methodology.

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In recent years reversible logic has emerged as a promising computing model for applications in dissipation less optical computing, low power CMOS, quantum computing, etc. In reversible circuits there exist a one-to-one mapping between the inputs and the outputs resulting in no loss of information. Researchers have implemented reversible logic gates in optical computing domain as it can provide high speed and low energy requirement along with easy fabrication at the chip level [1]. The all optical implementation of reversible gates are based on semiconductor optical amplifier (SOA) based Mach-Zehnder interferometer (MZI) due to its significant advantages such as high speed, low power, fast switching time and ease in fabrication. In this work we present the all optical implementation of an n bit reversible ripple carry adder for the first time in literature. The all optical reversible adder design is based on two new optical reversible gates referred as optical reversible gate I (ORG-I) and optical reversible gate II (ORG-II) and the existing all optical Feynman gate. The two new reversible gates ORG-I and ORGI-I are proposed as they can implement a reversible adder with reduced optical cost which is the measure of number of MZIs switches and the propagation delay, and with zero overhead in terms of number of ancilla inputs and the garbage outputs. The proposed all optical reversible adder design based on the ORG-I and ORG-II reversible gates are compared and shown to be better than the other existing designs of reversible adder proposed in non-optical domain in terms of number of MZIs, delay, number of ancilla inputs and the garbage outputs. The proposed all optical reversible ripple carry adder will be a key component of an all optical reversible ALU that can be applied in a wide variety of optical signal processing applications.

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Background/Objectives: The objective is to reduce the Quantum Cost (QC), Garbage Output (GO) and Gate Counts in the design of the adder by incorporating the Novel Reversible Gates. Methods/Statistical Analysis: In recent day’s energy dissipation is the major complex problem in circuit designing in order to recede this problem the reversible logic is employed, where the input vectors can be derived from the output vectors and from the output vectors the input vectors can be procured. Using this technique the Quantum Cost, Garbage Outputs and Gate Counts of the design is reduced. Findings: Based on the technique of reversible logic a novel reversible Gates is proposed from that the novel reversible adders have been designed. The novel reversible gates satisfy the property of reversibility and universality which shows the uniqueness of the proposed gates. The comparative analysis have been made with the existing work, the proposed work shows a significant improvement in the design optimization parameters. Application/Improvements: The proposed structures can be employed in the ALU design and in Floating Point Multiplier design. The comparative analysis shows that Number of Gates, Garbage Outputs and Quantum Cost is minimum for the proposed gate based structure rather than conventional one Keywords: Garbage Outputs (GO), QCA, Quantum Cost (QC), Reversibility, Reversible Logic, Universality.

Indian Journal of Science and Technology•Mar 4, 2016•4 citations
The reversible logic has promising applications in emerging computing paradigms, such as quantum computing, quantum dot cellular automata, optical computing, etc. In reversible logic gates, there is a unique one-to-one mapping between the inputs and outputs. To generate a useful gate function, the reversible gates require some constant ancillary inputs called ancilla inputs. Also to maintain the reversibility of the circuits some additional unused outputs are required that are referred to as the garbage outputs. The number of ancilla inputs, the number of garbage outputs and quantum cost plays an important role in the evaluation of reversible circuits. Thus minimizing these parameters are important for designing an efficient reversible circuit. Reversible circuits are of highest interest in optical computing, quantum dot cellular automata and quantum computing. The quantum gates perform an elementary unitary operation on one, two or more two-state quantum systems called qubits. Any unitary operation is reversible in nature, and hence, quantum networks are also reversible, to conclude the quantum computers must be built from reversible logic components. The main contribution of this dissertation is the design exploration and application of reversible circuits in emerging nanotechnologies. The emerging technologies explored in this work are 1) Optical quantum computing 2) Quantum computing. The first contribution of this dissertation is Mach-Zehnder interferometer based design of all optical reversible binary adder. The all optical reversible adder design is based on two new optical reversible gates referred as optical reversible gate I (ORG-I) and optical reversible gate II (ORG-II) and the existing all optical Feynman gate. The two new reversible gates ORG-I and ORGI-II have been proposed and can implement a reversible adder with a reduced optical cost which is equal to the number of MZI switches required, less propagation delay, and with zero overhead in terms of number of ancilla inputs and the garbage outputs. The proposed all optical reversible adder design based on the ORG-I and ORG-II reversible gates are compared and shown to be better than the other existing designs of reversible adder proposed in the non-optical domain in terms of number of MZI switches, delay, the number of ancilla inputs and the garbage outputs. The proposed all optical reversible adder will be a key component of an all optical reversible arithmetic logical unit (ALU), that is a quite essential component in a wide variety of optical signal processing applications. In the existing literature, the NAND logic based implementation is the only known implementation available for reversible gates and its functions. There is a lack of research in the direction of NOR logic based implementation of reversible gates and functions. The second contribution of this dissertation is the design of NOR logic based n-input and n-output reversible gates, one of which can be efficiently mapped into optical computing using the Mach-Zehnder interferometer (MZI), while the other can be mapped efficiently in optical computing using the linear optical quantum gates. The proposed reversible NOR gates work as a corresponding NOR counterpart of NAND logic based Toffoli gates. The proposed optical reversible NOR logic gates can implement the reversible boolean logic functions with less number of linear optical quantum logic gates with reduced optical cost and propagation delay compared to the implementation using existing optical reversible NAND gates. It is illustrated that an optical reversible gate library having both optical Toffoli gate and the proposed optical reversible NOR gate is superior compared to the library containing only the optical Toffoli gate: (i) in terms of number of linear optical quantum gates when implemented using linear optical quantum computing (LOQC), (ii) in terms of optical cost and delay when implemented using the Mach-Zehnder interferometer. The third contribution of this dissertation is a binary tree-based design methodology for a NxN reversible multiplier. The proposed binary tree-based design methodology for a NxN reversible multiplier performs the addition of partial products in parallel using the reversible ripple adders with zero ancilla bit and zero garbage bit; thereby, minimizing the number of ancilla and garbage bits used in the design. The proposed design methodology shows improvements in terms of number of ancilla inputs and garbage outputs compared to all the existing reversible multiplier designs. The methodology is also extended to the design of NxN reversible signed multiplier based on modified Baugh-Wooley multiplication methodology.
In recent years reversible logic has emerged as a promising computing model for applications in dissipation less optical computing, low power CMOS, quantum computing, etc. In reversible circuits there exist a one-to-one mapping between the inputs and the outputs resulting in no loss of information. Researchers have implemented reversible logic gates in optical computing domain as it can provide high speed and low energy requirement along with easy fabrication at the chip level [1]. The all optical implementation of reversible gates are based on semiconductor optical amplifier (SOA) based Mach-Zehnder interferometer (MZI) due to its significant advantages such as high speed, low power, fast switching time and ease in fabrication. In this work we present the all optical implementation of an n bit reversible ripple carry adder for the first time in literature. The all optical reversible adder design is based on two new optical reversible gates referred as optical reversible gate I (ORG-I) and optical reversible gate II (ORG-II) and the existing all optical Feynman gate. The two new reversible gates ORG-I and ORGI-I are proposed as they can implement a reversible adder with reduced optical cost which is the measure of number of MZIs switches and the propagation delay, and with zero overhead in terms of number of ancilla inputs and the garbage outputs. The proposed all optical reversible adder design based on the ORG-I and ORG-II reversible gates are compared and shown to be better than the other existing designs of reversible adder proposed in non-optical domain in terms of number of MZIs, delay, number of ancilla inputs and the garbage outputs. The proposed all optical reversible ripple carry adder will be a key component of an all optical reversible ALU that can be applied in a wide variety of optical signal processing applications.
In recent years reversible logic has emerged as a promising computing model for applications in dissipation less optical computing, low power CMOS, quantum computing, etc. In reversible circuits there exist a one-to-one mapping between the inputs and the outputs resulting in no loss of information. Researchers have implemented reversible logic gates in optical computing domain as it can provide high speed and low energy requirement along with easy fabrication at the chip level [1]. The all optical implementation of reversible gates are based on semiconductor optical amplifier (SOA) based Mach-Zehnder interferometer (MZI) due to its significant advantages such as high speed, low power, fast switching time and ease in fabrication. In this work we present the all optical implementation of an n bit reversible ripple carry adder for the first time in literature. The all optical reversible adder design is based on two new optical reversible gates referred as optical reversible gate I (ORG-I) and optical reversible gate II (ORG-II) and the existing all optical Feynman gate. The two new reversible gates ORG-I and ORGI-I are proposed as they can implement a reversible adder with reduced optical cost which is the measure of number of MZIs switches and the propagation delay, and with zero overhead in terms of number of ancilla inputs and the garbage outputs. The proposed all optical reversible adder design based on the ORG-I and ORG-II reversible gates are compared and shown to be better than the other existing designs of reversible adder proposed in non-optical domain in terms of number of MZIs, delay, number of ancilla inputs and the garbage outputs. The proposed all optical reversible ripple carry adder will be a key component of an all optical reversible ALU that can be applied in a wide variety of optical signal processing applications.
Reversible logic is emerging as a promising computing paradigm with applications in ultralow power nanocomputing and emerging nanotechnologies such as quantum computing, quantum dot cellular automata (QCA), optical computing, etc. Reversible circuits are similar to conventional logic circuits except that they are built from reversible gates. In reversible gates, there is a unique, one-to-one mapping between the inputs and outputs, not the case with conventional logic. One of the primary motivations for adopting reversible logic lies in the fact that it can provide a logic design methodology for designing ultra-low power circuits beyond KTln2 limit for those emerging nanotechnologies in which the energy dissipated due to information destruction will be a significant factor of the overall heat dissipation. Further, logic circuits for quantum computers must be built from reversible logic components. Several important metrics need to be considered in the design of reversible circuits the importance of which needs to be discussed. Quantum computers of many qubits are extremely difficult to realize thus the number of qubits in the quantum circuits needs to be minimized. This sets the major objective of optimizing the number of ancilla inputs and the number of the garbage outputs in the reversible logic based quantum circuits. The constant input in the reversible quantum circuit is called the ancilla input, while the garbage output refers to the output which exists in the circuit just to maintain one-to-one mapping but is not a primary or a useful output. The reversible circuit has other important parameters of quantum cost and delay which need to be optimized.
Reversible logic is gaining significance in the context of emerging technologies such as quantum computing since reversible circuits do not lose information during computation and there is one-to-one mapping between the inputs and outputs. In this work, we present a class of new designs for reversible binary and BCD adder circuits. The proposed designs are primarily optimized for the number of ancilla inputs and the number of garbage outputs and are designed for possible best values for the quantum cost and delay. In reversible circuits, in addition to the primary inputs, some constant input bits are used to realize different logic functions which are referred to as ancilla inputs and are overheads that need to be reduced. Further, the garbage outputs which do not contribute to any useful computations but are needed to maintain reversibility are also overheads that need to be reduced in reversible designs. First, we propose two new designs for the reversible ripple carry adder: (i) one with no input carry c 0 and no ancilla input bits, and (ii) one with input carry c 0 and no ancilla input bits. The proposed reversible ripple carry adder designs with no ancilla input bits have less quantum cost and logic depth (delay) compared to their existing counterparts in the literature. In these designs, the quantum cost and delay are reduced by deriving designs based on the reversible Peres gate and the TR gate. Next, four new designs for the reversible BCD adder are presented based on the following two approaches: (i) the addition is performed in binary mode and correction is applied to convert to BCD when required through detection and correction, and (ii) the addition is performed in binary mode and the result is always converted using a binary to BCD converter. The proposed reversible binary and BCD adders can be applied in a wide variety of digital signal processing applications and constitute important design components of reversible computing.
Reversible computing is an emerging field of research and has made remarkable progress. Owing to the reduced energy dissipation in reversible circuits, a lot of research has been done on the design of reversible circuits. In reversible logic circuit designs, along with primary inputs, few constant inputs (Ancilla Inputs) are used to realize required reversible functions. In addition to this, few unused or extra output bits are generated; these bits are named as Garbage Output bits. A challenge in the reversible computation is to use minimum Ancilla Inputs and generate zero Garbage Outputs. In this work, we present designs for addition, subtraction, and addition or subtraction operations. The designs are primarily optimized to achieve zero Garbage Outputs and minimum Ancilla Inputs. In addition, these proposed arithmetic circuits are designed for best Gate Count and Quantum Cost values compared to the existing counterparts.
Background/Objectives: The objective is to reduce the Quantum Cost (QC), Garbage Output (GO) and Gate Counts in the design of the adder by incorporating the Novel Reversible Gates. Methods/Statistical Analysis: In recent day’s energy dissipation is the major complex problem in circuit designing in order to recede this problem the reversible logic is employed, where the input vectors can be derived from the output vectors and from the output vectors the input vectors can be procured. Using this technique the Quantum Cost, Garbage Outputs and Gate Counts of the design is reduced. Findings: Based on the technique of reversible logic a novel reversible Gates is proposed from that the novel reversible adders have been designed. The novel reversible gates satisfy the property of reversibility and universality which shows the uniqueness of the proposed gates. The comparative analysis have been made with the existing work, the proposed work shows a significant improvement in the design optimization parameters. Application/Improvements: The proposed structures can be employed in the ALU design and in Floating Point Multiplier design. The comparative analysis shows that Number of Gates, Garbage Outputs and Quantum Cost is minimum for the proposed gate based structure rather than conventional one Keywords: Garbage Outputs (GO), QCA, Quantum Cost (QC), Reversibility, Reversible Logic, Universality.