Challenges
Datasets
Workspaces
Papers
Discussions
Leaderboard
Log inSign up
Challenges
Datasets
Workspaces
Papers
Discussions
Leaderboard
Blog
Job Board
Q3AS

© 2026 Aqora Quantum S.A.S.

TermsPrivacyLegal Notice

IEEE International Conference on Quantum Computing and Engineering (QCE)

Real-Time DCZ Gate Control by Bayesian Optimization with Forgetting

Yudai Sato, T. Kawahara

Published Aug 30, 2025• 0 citations
Publisher

Abstract

Silicon spin qubits are a promising platform for large-scale quantum computing because of their compatibility with advanced semiconductor fabrication technology. However, charge noise remains a major challenge since it causes timedependent drifts in qubit frequency and exchange interactions through electric field fluctuations. These drifts in control parameters are one obstacle to achieving the high-fidelity quantum operations required for quantum error correction. In this work, we propose a Bayesian optimization (BO) framework for the adaptive calibration of quantum gate parameters in silicon qubits. In addition, to address the impact of charge noise, which exhibits a$1 / f$-like power spectral density, we incorporate a forgetting mechanism into the Gaussian process model used during optimization. Our simulations on a realistic silicon quantum dot system show that BO-based method improves gate fidelity by 0.266% and reduces calibration iterations by 36.9% compared to random search. Compared to standard BO, our modified method achieves a further fidelity gain of 0.008% and a 9.23% reduction in iterations. These results highlight the potential of BO-based calibration for robust quantum gate implementation under realistic noise conditions.

DOI
10.1109/qce65121.2025.00151

Related papers

Fast Quantum Calibration using Bayesian Optimization with State Parameter Estimator for Non-Markovian Environment

Qian, Peng, Qamar, Shahid, Xiao Xiao +5 more

As quantum systems expand in size and complexity, manual qubit characterization and gate optimization will be a non-scalable and time-consuming venture. Physical qubits have to be carefully calibrated because quantum processors are very sensitive to the external environment, with control hardware parameters slowly drifting during operation, affecting gate fidelity. Currently, existing calibration techniques require complex and lengthy measurements to independently control the different parameters of each gate and are unscalable to large quantum systems. Therefore, fully automated protocols with the desired functionalities are required to speed up the calibration process. This paper aims to propose single-qubit calibration of superconducting qubits under continuous weak measurements from a real physical experimental settings point of view. We propose a real-time optimal estimator of qubit states, which utilizes weak measurements and Bayesian optimization to find the optimal control pulses for gate design. Our numerical results demonstrate a significant reduction in the calibration process, obtaining a high gate fidelity. Using the proposed estimator we estimated the qubit state with and without measurement noise and the estimation error between the qubit state and the estimator state is less than 0.02. With this setup, we drive an approximated pi pulse with final fidelity of 0.9928. This shows that our proposed strategy is robust against the presence of measurement and environmental noise and can also be applicable for the calibration of many other quantum computation technologies.

arXiv:2205.12929•May 25, 2022•1 citation

Impact of gate-voltage noise on silicon spin-qubit variational quantum eigensolvers

Xinning Wang, Bohdan Khromets, Zachery Merino +1 more

Quantum computers offer a route to outperform classical methods in tasks such as molecular simulation, motivating hybrid algorithms like the Variational Quantum Eigensolver (VQE) for near-term devices. Silicon spin qubits are a promising platform for scalable quantum computation, but their performance is limited by hardware imperfections -- most notably charge-noise-induced potential fluctuations and static miscalibration of gate-electrode voltages -- which degrade quantum gate fidelities and, ultimately, algorithmic accuracy. Here we develop a hardware-algorithm co-simulation framework for silicon quantum-dot processors that links 3D electrostatics to effective $g$-factors and exchange couplings, and propagates voltage-level noise through realistic control pulses. Using VQE for $\mathrm{H}_2$ ground-state energy estimation as a circuit-level testbed, we study both static scaling/offset errors on the gate-electrode voltages and stochastic fluctuations modeled as random-telegraph noise with tunable amplitudes and switching times. At the gate level, we show that exchange-based two-qubit gates are roughly an order of magnitude more sensitive to these types of noise than ESR-driven single-qubit rotations. Quantum process tomography and Kraus-operator analysis further distinguish coherent and incoherent contributions and quantify the fraction of error that is, in principle, correctable by a compensating unitary. Embedding these noise models into the VQE circuit, we identify regimes of miscalibration strength and noise switching time compatible with chemically accurate energy estimates, and discuss how statistical post-processing based on the full distribution of noisy energy estimates could further improve accuracy.

quant-pharXiv:2606.08874•Jun 9, 2026•0 citations

Impact of gate-voltage noise on silicon spin-qubit variational quantum eigensolvers

Xinning Wang, Bohdan Khromets, Zach D. Merino +1 more

Abstract Quantum computers offer a route to outperform classical methods in tasks such as molecular simulation, motivating hybrid algorithms like the variational quantum eigensolver (VQE) for near-term devices. Silicon spin qubits are a promising platform for scalable quantum computation, but their performance is limited by hardware imperfections—most notably charge-noise–induced potential fluctuations and static miscalibration of gate-electrode voltages—which degrade quantum gate fidelities and, ultimately, algorithmic accuracy. Here we develop a hardware–algorithm co-simulation framework for silicon quantum-dot processors that links 3D electrostatics to effective g -factors and exchange couplings, and propagates voltage-level noise through realistic control pulses. Using VQE for H 2 ground-state energy estimation as a circuit-level testbed, we study both static scaling/offset errors on the gate-electrode voltages and stochastic fluctuations modeled as random-telegraph noise with tunable amplitudes and switching times. At the gate level, we show that exchange-based two-qubit gates are roughly an order of magnitude more sensitive to these types of noise than ESR-driven single-qubit rotations. Quantum process tomography and Kraus-operator analysis further distinguish coherent and incoherent contributions and quantify the fraction of error that is, in principle, correctable by a compensating unitary. Embedding these noise models into the VQE circuit, we identify regimes of miscalibration strength and noise switching time compatible with chemically accurate energy estimates, and discuss how statistical post-processing based on the full distribution of noisy energy estimates could further improve accuracy.

Quantum Science and Technology•Jul 28, 2026•0 citations

AI-Assisted Control Systems for Quantum Hardware Optimization

Clara Schmidt, Isabella Rossi

Quantum hardware control -- the precise calibration of microwave pulses, flux biases, and laser parameters that drive qubit operations -- is a critical bottleneck in scaling superconducting and trapped-ion quantum processors. Manual calibration is time-consuming, requires expert domain knowledge, and fails to adapt to rapid parameter drift between calibration cycles. AI-assisted control systems offer automated, adaptive alternatives using reinforcement learning (RL), Bayesian optimisation (BO), and neural network surrogate models to continuously optimise hardware control parameters. This paper proposes the AI Quantum Control Framework (AQCF), evaluating six AI control strategies across five hardware optimisation tasks: single-qubit gate calibration, two-qubit gate optimisation, crosstalk suppression, readout fidelity maximisation, and real-time drift compensation. AQCF is evaluated on IBM Quantum Eagle and IonQ Aria hardware over 60-day continuous operation. Key results: RL-based pulse optimisation improves two-qubit gate fidelity by 18.4% over manual calibration; Bayesian optimisation reduces calibration time by 84% (from 4.2 hours to 40 minutes); neural surrogate models enable real-time drift compensation with 12.8-minute response latency. The framework introduces the AI Control Efficiency Score (ACES) and a deployment roadmap for autonomous quantum hardware management.

Quantum Frontiers Journal•Nov 18, 2025•0 citations

Few-Shot, Robust Calibration of Single Qubit Gates Using Bayesian Robust Phase Estimation

Travis Hurant, Ke Sun, Zhubing Jia +2 more

Accurate calibration of control parameters in quan-tum gates is crucial for high-fidelity operations, yet it represents a significant time and resource challenge, necessitating periods of downtime for quantum computers. Robust Phase Estimation (RPE) [8] has emerged as a practical and effective calibration technique aimed at tackling this challenge. It combines a provably efficient number of control pulses with a classical post-processing algorithm to estimate the phase accumulated by a quantum gate. We introduce Bayesian Robust Phase Estimation (BRPE), an in-novative approach that integrates Bayesian parameter estimation into the classical post-processing phase to reduce the sampling overhead. Our numerical analysis shows that BRPE markedly reduces phase estimation errors, requiring approximately 50% fewer samples than standard RPE. Specifically, in an ideal, noise-free setting, it achieves up to a 96% reduction in average absolute estimation error for a fixed sample cost of 88 shots when compared to RPE. Under a depolarizing noise model, it attains up to a 47% reduction for a fixed cost of 1 76 shots. Additionally, we adapt BRPE for Ramsey spectroscopy applications and successfully implement it experimentally in a trapped ion system.

arXiv:2407.18339•IEEE International Conference on Quantum Computing and Engineering (QCE)•Sep 15, 2024•0 citations

Modeling semiconductor spin qubits and their charge noise environment for quantum gate fidelity estimation

M. Mohamed El Kordy Shehata, George Simion, Ruoyu Li +7 more

The spin of an electron confined in semiconductor quantum dots is currently a promising candidate for quantum bit (qubit) implementations. Taking advantage of the existing CMOS integration technologies, such devices can offer a platform for large scale quantum computation. However, a quantum mechanical framework bridging a device's physical design and operational parameters to the qubit's energy space is lacking. Furthermore, the spin to charge coupling introduced by intrinsic or induced spin-orbit interaction (SOI) exposes the qubits to charge noise compromising their coherence properties and inducing quantum gate errors. We present here a comodeling framework for double quantum dot (DQD) devices and their charge noise environments. We use a combination of an electrostatic potential solver, full configuration interaction quantum mechanical methods, and two-level-fluctuator models to study the quantum gate performance in realistic device designs and operation conditions. We utilize the developed models together alongside the single electron solutions of the quantum dots to simulate one- and two-qubit gates in the presence of charge noise. We find an inverse correlation between quantum gate errors and quantum dot confinement frequencies. We calculate X-gate fidelities $>97%$ in the simulated Si-MOS devices at a typical TLF density of ${10}^{11}\phantom{\rule{4pt}{0ex}}{\mathrm{cm}}^{\ensuremath{-}2}$. We also find that exchange driven two-qubit SWAP gates show higher sensitivity to charge noise with fidelities down to $91%$ in the presence of the same density of TLFs. We further investigate the one- and two-qubit gate fidelities at different TLF densities. We find that given the small size of the quantum dots, sensitivity of a quantum gate to the distance between the noise sources and the quantum dot creates a strong variability in the quantum gate fidelities, which can compromise the device yields in scaled qubit technologies.

arXiv:2210.04539•Physical review. B./Physical review. B•Jul 13, 2023•40 citations
Silicon spin qubits are a promising platform for large-scale quantum computing because of their compatibility with advanced semiconductor fabrication technology. However, charge noise remains a major challenge since it causes timedependent drifts in qubit frequency and exchange interactions through electric field fluctuations. These drifts in control parameters are one obstacle to achieving the high-fidelity quantum operations required for quantum error correction. In this work, we propose a Bayesian optimization (BO) framework for the adaptive calibration of quantum gate parameters in silicon qubits. In addition, to address the impact of charge noise, which exhibits a1/f1 / f1/f-like power spectral density, we incorporate a forgetting mechanism into the Gaussian process model used during optimization. Our simulations on a realistic silicon quantum dot system show that BO-based method improves gate fidelity by 0.266% and reduces calibration iterations by 36.9% compared to random search. Compared to standard BO, our modified method achieves a further fidelity gain of 0.008% and a 9.23% reduction in iterations. These results highlight the potential of BO-based calibration for robust quantum gate implementation under realistic noise conditions.
As quantum systems expand in size and complexity, manual qubit characterization and gate optimization will be a non-scalable and time-consuming venture. Physical qubits have to be carefully calibrated because quantum processors are very sensitive to the external environment, with control hardware parameters slowly drifting during operation, affecting gate fidelity. Currently, existing calibration techniques require complex and lengthy measurements to independently control the different parameters of each gate and are unscalable to large quantum systems. Therefore, fully automated protocols with the desired functionalities are required to speed up the calibration process. This paper aims to propose single-qubit calibration of superconducting qubits under continuous weak measurements from a real physical experimental settings point of view. We propose a real-time optimal estimator of qubit states, which utilizes weak measurements and Bayesian optimization to find the optimal control pulses for gate design. Our numerical results demonstrate a significant reduction in the calibration process, obtaining a high gate fidelity. Using the proposed estimator we estimated the qubit state with and without measurement noise and the estimation error between the qubit state and the estimator state is less than 0.02. With this setup, we drive an approximated pi pulse with final fidelity of 0.9928. This shows that our proposed strategy is robust against the presence of measurement and environmental noise and can also be applicable for the calibration of many other quantum computation technologies.
Quantum computers offer a route to outperform classical methods in tasks such as molecular simulation, motivating hybrid algorithms like the Variational Quantum Eigensolver (VQE) for near-term devices. Silicon spin qubits are a promising platform for scalable quantum computation, but their performance is limited by hardware imperfections -- most notably charge-noise-induced potential fluctuations and static miscalibration of gate-electrode voltages -- which degrade quantum gate fidelities and, ultimately, algorithmic accuracy. Here we develop a hardware-algorithm co-simulation framework for silicon quantum-dot processors that links 3D electrostatics to effective ggg-factors and exchange couplings, and propagates voltage-level noise through realistic control pulses. Using VQE for H2\mathrm{H}_2H2​ ground-state energy estimation as a circuit-level testbed, we study both static scaling/offset errors on the gate-electrode voltages and stochastic fluctuations modeled as random-telegraph noise with tunable amplitudes and switching times. At the gate level, we show that exchange-based two-qubit gates are roughly an order of magnitude more sensitive to these types of noise than ESR-driven single-qubit rotations. Quantum process tomography and Kraus-operator analysis further distinguish coherent and incoherent contributions and quantify the fraction of error that is, in principle, correctable by a compensating unitary. Embedding these noise models into the VQE circuit, we identify regimes of miscalibration strength and noise switching time compatible with chemically accurate energy estimates, and discuss how statistical post-processing based on the full distribution of noisy energy estimates could further improve accuracy.
Abstract Quantum computers offer a route to outperform classical methods in tasks such as molecular simulation, motivating hybrid algorithms like the variational quantum eigensolver (VQE) for near-term devices. Silicon spin qubits are a promising platform for scalable quantum computation, but their performance is limited by hardware imperfections—most notably charge-noise–induced potential fluctuations and static miscalibration of gate-electrode voltages—which degrade quantum gate fidelities and, ultimately, algorithmic accuracy. Here we develop a hardware–algorithm co-simulation framework for silicon quantum-dot processors that links 3D electrostatics to effective g -factors and exchange couplings, and propagates voltage-level noise through realistic control pulses. Using VQE for H 2 ground-state energy estimation as a circuit-level testbed, we study both static scaling/offset errors on the gate-electrode voltages and stochastic fluctuations modeled as random-telegraph noise with tunable amplitudes and switching times. At the gate level, we show that exchange-based two-qubit gates are roughly an order of magnitude more sensitive to these types of noise than ESR-driven single-qubit rotations. Quantum process tomography and Kraus-operator analysis further distinguish coherent and incoherent contributions and quantify the fraction of error that is, in principle, correctable by a compensating unitary. Embedding these noise models into the VQE circuit, we identify regimes of miscalibration strength and noise switching time compatible with chemically accurate energy estimates, and discuss how statistical post-processing based on the full distribution of noisy energy estimates could further improve accuracy.
Quantum hardware control -- the precise calibration of microwave pulses, flux biases, and laser parameters that drive qubit operations -- is a critical bottleneck in scaling superconducting and trapped-ion quantum processors. Manual calibration is time-consuming, requires expert domain knowledge, and fails to adapt to rapid parameter drift between calibration cycles. AI-assisted control systems offer automated, adaptive alternatives using reinforcement learning (RL), Bayesian optimisation (BO), and neural network surrogate models to continuously optimise hardware control parameters. This paper proposes the AI Quantum Control Framework (AQCF), evaluating six AI control strategies across five hardware optimisation tasks: single-qubit gate calibration, two-qubit gate optimisation, crosstalk suppression, readout fidelity maximisation, and real-time drift compensation. AQCF is evaluated on IBM Quantum Eagle and IonQ Aria hardware over 60-day continuous operation. Key results: RL-based pulse optimisation improves two-qubit gate fidelity by 18.4% over manual calibration; Bayesian optimisation reduces calibration time by 84% (from 4.2 hours to 40 minutes); neural surrogate models enable real-time drift compensation with 12.8-minute response latency. The framework introduces the AI Control Efficiency Score (ACES) and a deployment roadmap for autonomous quantum hardware management.
Accurate calibration of control parameters in quan-tum gates is crucial for high-fidelity operations, yet it represents a significant time and resource challenge, necessitating periods of downtime for quantum computers. Robust Phase Estimation (RPE) [8] has emerged as a practical and effective calibration technique aimed at tackling this challenge. It combines a provably efficient number of control pulses with a classical post-processing algorithm to estimate the phase accumulated by a quantum gate. We introduce Bayesian Robust Phase Estimation (BRPE), an in-novative approach that integrates Bayesian parameter estimation into the classical post-processing phase to reduce the sampling overhead. Our numerical analysis shows that BRPE markedly reduces phase estimation errors, requiring approximately 50% fewer samples than standard RPE. Specifically, in an ideal, noise-free setting, it achieves up to a 96% reduction in average absolute estimation error for a fixed sample cost of 88 shots when compared to RPE. Under a depolarizing noise model, it attains up to a 47% reduction for a fixed cost of 1 76 shots. Additionally, we adapt BRPE for Ramsey spectroscopy applications and successfully implement it experimentally in a trapped ion system.
The spin of an electron confined in semiconductor quantum dots is currently a promising candidate for quantum bit (qubit) implementations. Taking advantage of the existing CMOS integration technologies, such devices can offer a platform for large scale quantum computation. However, a quantum mechanical framework bridging a device's physical design and operational parameters to the qubit's energy space is lacking. Furthermore, the spin to charge coupling introduced by intrinsic or induced spin-orbit interaction (SOI) exposes the qubits to charge noise compromising their coherence properties and inducing quantum gate errors. We present here a comodeling framework for double quantum dot (DQD) devices and their charge noise environments. We use a combination of an electrostatic potential solver, full configuration interaction quantum mechanical methods, and two-level-fluctuator models to study the quantum gate performance in realistic device designs and operation conditions. We utilize the developed models together alongside the single electron solutions of the quantum dots to simulate one- and two-qubit gates in the presence of charge noise. We find an inverse correlation between quantum gate errors and quantum dot confinement frequencies. We calculate X-gate fidelities >97>97%>97 in the simulated Si-MOS devices at a typical TLF density of ${10}^{11}\phantom{\rule{4pt}{0ex}}{\mathrm{cm}}^{\ensuremath{-}2}$. We also find that exchange driven two-qubit SWAP gates show higher sensitivity to charge noise with fidelities down to 9191%91 in the presence of the same density of TLFs. We further investigate the one- and two-qubit gate fidelities at different TLF densities. We find that given the small size of the quantum dots, sensitivity of a quantum gate to the distance between the noise sources and the quantum dot creates a strong variability in the quantum gate fidelities, which can compromise the device yields in scaled qubit technologies.