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International Conference on Communication and Information Processing (ICCIP)

High-throughput Improved SCL-Flip Polar Code Decoder Architecture

Yansong Li, Jiahao Wang, Ling Zhao, Rong Liu

Published Nov 21, 2024• 0 citations
Publisher

Abstract

SCL-Flip (SCLF) is a novel low-complexity polar code decoding algorithm that combines Successive Cancellation List (SCL) decoding with flip-based techniques, offering a trade-off between error rate performance, area efficiency, and energy consumption.This paper introduces an innovative flip-based architecture for a highly area-efficient SCL decoder.We simplify the transcendental computations in SCLF decoding through approximation and incorporate an efficient early termination technique to reduce redundant flip operations.The proposed hardware architecture for the SCLF decoder features an early stopping strategy and an efficient metric sorter.Our simplifications and approximations have minimal impact on error correction performance.The proposed design reduces the computational complexity of SCLF decoding across a wide range of signal-to-noise ratios (SNRs), demonstrating its potential for practical applications in communication systems.We validate the effectiveness of the architecture through implementation on an FPGA platform.Compared to state-of-the-art fast SCL8 decoders with equivalent Block Error Rate (BLER) performance, our proposed decoders achieve up to 7.57 times greater throughput per LUT.This improvement in area efficiency also translates to enhanced energy efficiency, making the proposed SCLF decoder a promising solution for modern communication systems requiring high performance and resource efficiency.

DOI
10.1145/3708657.3708702

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IEEE International Conference on Computer and Communications (ICCC)•Dec 1, 2018•1 citation
SCL-Flip (SCLF) is a novel low-complexity polar code decoding algorithm that combines Successive Cancellation List (SCL) decoding with flip-based techniques, offering a trade-off between error rate performance, area efficiency, and energy consumption.This paper introduces an innovative flip-based architecture for a highly area-efficient SCL decoder.We simplify the transcendental computations in SCLF decoding through approximation and incorporate an efficient early termination technique to reduce redundant flip operations.The proposed hardware architecture for the SCLF decoder features an early stopping strategy and an efficient metric sorter.Our simplifications and approximations have minimal impact on error correction performance.The proposed design reduces the computational complexity of SCLF decoding across a wide range of signal-to-noise ratios (SNRs), demonstrating its potential for practical applications in communication systems.We validate the effectiveness of the architecture through implementation on an FPGA platform.Compared to state-of-the-art fast SCL8 decoders with equivalent Block Error Rate (BLER) performance, our proposed decoders achieve up to 7.57 times greater throughput per LUT.This improvement in area efficiency also translates to enhanced energy efficiency, making the proposed SCLF decoder a promising solution for modern communication systems requiring high performance and resource efficiency.
Successive cancellation list decoders with flip operations (SCL-Flip) can utilize re-decoding attempts to significantly improve the error-correction performance of polar codes. However, these re-decoding attempts result in extra computation complexity, which thus leads to increased energy consumption and decoding latency to the communication system adopting SCL-Flip decoders. To significantly reduce the computation complexity of current SCL-Flip decoders, we design a new adaptive SCL-Flip (AD-SCLF) decoder, which can be easily implemented based on existing SCL-Flip techniques. Simulation results showed that the AD-SCLF can reduce up to 80.85\% of the computational complexity of a current SCL-Flip decoder at a matched FER=10−3FER=10^{-3}FER=10−3. The result implies our decoder can significantly reduce the energy consumption caused by redundant re-decoding attempts from the SCL-Flip decoder.
This work presents a fast successive-cancellation list flip (Fast-SCLF) decoding algorithm for polar codes that addresses the high latency issue associated with the successive-cancellation list flip (SCLF) decoding algorithm. We first propose a bit-flipping strategy tailored to the state-of-the-art fast successive-cancellation list (FSCL) decoding that avoids tree-traversal in the binary tree representation of SCLF, thus reducing the latency of the decoding process. We then derive a parameterized path selection error model to accurately estimate the bit index at which the correct decoding path is eliminated from the initial FSCL decoding. The trainable parameter is optimized online based on an efficient supervised learning framework. Simulation results show that for a polar code of length 512 with 256 information bits, with similar error-correction performance and memory consumption, the proposed Fast-SCLF decoder reduces up to 73.4% of the average decoding latency of the SCLF decoder with the same list size at the frame error rate of 10−4, while incurring a maximum computational complexity overhead of 27.6%. For the same polar code of length 512 with 256 information bits and at practical signal-to-noise ratios, the proposed decoder with list size 4 reduces 89.3% and 43.7% of the average complexity and decoding latency of the FSCL decoder with list size 32 (FSCL-32), respectively, while also reducing 83.2% of the memory consumption of FSCL-32. The significant improvements of the proposed decoder come at the cost of 0.07 dB error-correction performance degradation compared with FSCL-32.
Polar codes, as the coding scheme for the control channel in fifth-generation mobile communication technology (5G), have attracted widespread attention since their proposal. As a mainstream decoding algorithm for polar codes, the successive cancellation list (SCL) decoder usually improves the error correction performance by increasing the list size, but this method suffers from the problems of high decoding complexity. To address this problem, this paper proposes a layered-search bit-flipping (LS-SCLF) decoding algorithm based on SCL decoding. Firstly, a new flip-bit metric is proposed, which derives a formula to approximate the probability of an error occurring in an information bit. This formula introduces a perturbation parameter to improve the calculation accuracy. Secondly, a compromise scheme for determining the perturbation parameter is proposed. The scheme uses Monte Carlo simulation to determine an optimized parameter for the precise positioning of the first erroneous decoded bit under different decoding conditions. Finally, a layered search strategy is adopted to sequentially search the erroneous decoded bits from the low order to high order, which can correct up to multiple bits at the same time. Simulation results show that the proposed algorithm achieves improved error correction performance with a slight increase in decoding complexity compared to the generalized SCL-Flip (GSCLF) decoding algorithm. This algorithm also achieves a good balance between the error correction performance and decoding complexity.
Polar codes concatenated with a cyclic redundancy check (CRC) code have been selected in the 5G standard with the successive-cancellation list (SCL) of list size L = 8 as the baseline algorithm. Despite providing great error-correction performance, a large list size increases the hardware complexity of the SCL decoder. Alternatively, flip decoding algorithms were proposed to improve the error-correction performance with a low-complexity hardware implementation. The combination of list and flip algorithms, the successive-cancellation list flip (SCLF) and dynamic SCLF (DSCLF) algorithms, provides error-correction performance close to SCL-32 with a list size L = 2 and Tmax = 300 maximum additional trials. However, these decoders have a variable execution time, a characteristic that poses a challenge to some practical applications. In this work, we propose a restart mechanism for list-flip algorithms that allows us to skip parts of the decoding computations without affecting the error-correction performance. We show that the restart location cannot realistically be allowed to occur at any location in a codeword as it would lead to an unreasonable memory overhead under DSCLF. Hence, we propose a mechanism where the possible restart locations are limited to a set and propose various construction methods for that set. The construction methods are compared, and the tradeoffs are discussed. For a polar code of length N = 1024 and rate ¼, under DSCLF decoding with a list size L = 2 and a maximum number of trials Tmax = 300, our proposed approach is shown to reduce the average execution time by 41.7% with four restart locations at the cost of approximately 1.5% in memory overhead.
The eBCH-polar codes is a powerful way to construct polar codes. With high minimum Hamming distance, it outperforms ordinary Polar codes under successive cancellation list (SCL) decoder. However, the absence of cyclic redundancy check (CRC) bits in eBCH-polar codes makes it challenging to adopt SCL-flip (SCLF) decoding scheme. In this research, we propose a flip scheme activated by a Normalized Path Metric (PM) range and a mismatch criterion, which respectively leverage the properties of SCL decoding and dynamic frozen bits of eBCH-polar codes. This work also improves the selection the flipping bits by modifying metric to account for the structure of dynamic frozen bits and reduce the search space. Based on these modifications, we proposed SCLF-1 and SCLF-2 decoding algorithms for eBCH-polar codes. Simulation results show that both of the proposed decoding schemes achieve superior performance compared to other contemporary decoding algorithms for CRC aided polar (CA-polar) codes, demonstrating enhanced error rates performance within the same decoding attempt.
When the code length is finite, the successive cancellation list (SCL) decoding of polar codes shows as good error-correction performance as low-density parity-check codes and turbo codes and it will be used in high-speed communications. However, since the hardware complexity of the SCL increases linearly as the size of the list increases, it is difficult to use the high-complexity SCL decoding for devices with limited resource such as IoT devices. The successive cancellation flip (SCF) decoding algorithm has been proposed to solve the problem of high hardware complexity and to enhance the error-correction performance of successive cancellation decoding. However, the conventional SCF decoding has high computational complexity. In this paper, we propose the interleaver-aided successive cancellation flip (ISCF) decoding to reduce the computational complexity. The computational complexity of the ISCF decoding is less by at least 32% than the conventional SCF decoding for error frame at Eb/N0=3.5dB.