In classical computing, 2’s complement representation is essential for handling signed binary arithmetic, enabling efficient operations for both positive and negative numbers. However, many quantum multiplication circuits typically lack native support for 2’s complement, limiting their application to signed arithmetic tasks. Prior quantum multiplication algorithms capable of handling 2’s complement often demand an impractically large number of qubits. This paper introduces 3 novel quantum circuit designs for real-number 2’s complement multiplication, inspired by classical signed multiplication algorithms. These designs achieve a quadratic time complexity, comparable to RCA-based quantum unsigned multiplication algorithms, while significantly reducing qubit requirements compared to prior quantum signed multiplication schemes. The first model requires the largest number of qubits but applies to a broad range of cases; the second uses fewer qubits but requires specific multiplier conditions; and the third uses the fewest qubits but operates under stricter multiplier constraints and circuit positioning conditions. Benchmarking results demonstrate their ability to perform 2’s complement multiplication correctly. This work advances qubit-efficient solutions, laying a foundation for further development of 2’s complement-based quantum algorithms.
In classical computing, 2’s complement representation is essential for handling signed binary arithmetic, enabling efficient operations for both positive and negative numbers. However, many quantum multiplication circuits typically lack native support for 2’s complement, limiting their application to signed arithmetic tasks. Prior quantum multiplication algorithms capable of handling 2’s complement often demand an impractically large number of qubits. This paper introduces 3 novel quantum circuit designs for real-number 2’s complement multiplication, inspired by classical signed multiplication algorithms. These designs achieve a quadratic time complexity, comparable to RCA-based quantum unsigned multiplication algorithms, while significantly reducing qubit requirements compared to prior quantum signed multiplication schemes. The first model requires the largest number of qubits but applies to a broad range of cases; the second uses fewer qubits but requires specific multiplier conditions; and the third uses the fewest qubits but operates under stricter multiplier constraints and circuit positioning conditions. Benchmarking results demonstrate their ability to perform 2’s complement multiplication correctly. This work advances qubit-efficient solutions, laying a foundation for further development of 2’s complement-based quantum algorithms.
Despite the great interest that the scientific community has in quantum computing, the scarcity and high cost of resources prevent to advance in this field. Specifically, qubits are very expensive to build, causing the few available quantum computers are tremendously limited in their number of qubits and delaying their progress. This work presents new reversible circuits that optimize the necessary resources for the conversion of a sign binary number into two's complement of N digits. The benefits of our work are two: on the one hand, the proposed two's complement converters are fault tolerant circuits and also are more efficient in terms of resources (essentially, quantum cost, number of qubits, and T-count) than the described in the literature. On the other hand, valuable information about available converters and, what is more, quantum adders, is summarized in tables for interested researchers. The converters have been measured using robust metrics and have been compared with the state-of-the-art circuits. The code to build them in a real quantum computer is given.
The quantum Fourier transform (QFT) brings efficiency in many respects, especially usage of resource, for most operations on quantum computers. In this study, the existing QFT-based and non-QFT-based quantum arithmetic operations are examined. The capabilities of QFT-based addition and multiplication are improved with some modifications. The proposed operations are compared with the nearest quantum arithmetic operations. Furthermore, novel QFT-based subtraction, division and exponentiation operations are presented. The proposed arithmetic operations can perform nonmodular operations on all signed numbers without any limitation by using less resources. In addition, novel quantum circuits of two’s complement, absolute value and comparison operations are also presented by using the proposed QFT-based addition and subtraction operations.
Quantum computing has advanced rapidly in recent decades, driven by developments across the technology stack, including quantum error-correcting codes and efficient quantum algorithms. Among these, quantum arithmetic circuits serve as fundamental building blocks for various promising algorithms. Despite their crucial role, the design of quantum arithmetic circuits faces challenges arising from the no-cloning theorem, qubit limitations, and circuit depth constraints, which significantly impact the efficiency of large-scale quantum computing. We provide an overview of quantum arithmetic circuits in the context of public-key cryptanalysis, with particular emphasis on optimization strategies such as measurement-based uncomputation and conditionally clean ancilla. We review state-of-the-art designs for essential arithmetic operations in public-key cryptanalysis such as addition, multiplication, and modular exponentiation. We also present an overview of the techniques used for fault-tolerant runtime and resource estimation in quantum cryptanalysis. In brief, this chapter emphasizes strategies for designing resource-efficient quantum arithmetic circuits, providing a basis for realistic evaluations of quantum cryptanalytic capabilities.
Abstract The Quantum Fourier Transform (QFT) grants competitive advantages, especially in resource usage and circuit approximation, for performing arithmetic operations on quantum computers , and offers a potential route towards a numerical quantum-computational paradigm. In this paper, we utilize efficient techniques to implement QFT-based integer addition and multiplications. These operations are fundamental to various quantum applications including Shor’s algorithm, weighted sum optimization problems in data processing and machine learning, and quantum algorithms requiring inner products. We carry out performance evaluations of these implementations based on IBM’s superconducting qubit architecture using different compatible noise models. We isolate the sensitivity of the component quantum circuits on both one-/two-qubit gate error rates, and the number of the arithmetic operands’ superposed integer states. We analyze performance, and identify the most effective approximation depths for unsigned quantum addition and quantum multiplication within the given context. We then perform a similar analysis of signed addition and compare to the unsigned results. We observe significant dependency of the optimal approximation depth on the degree of machine noise and the number of superposed states in certain performance regimes. Finally, we elaborate on the algorithmic challenges - relevant to signed, unsigned, modular and non-modular versions - that could also be applied to current implementations of QFT-based subtraction, division, exponentiation, and their potential tensor extensions. We analyze the performance trends in our results and speculate on possible future developments within this computational paradigm.
Quantum arithmetic logic units (QALUs) constitute a fundamental component of quantum computing. However, the implementation of QALUs on near-term quantum computers remains a substantial challenge, largely due to the limited connectivity of qubits. In this paper, we propose feasible QALUs, including quantum binary adders, subtractors, multipliers, and dividers, which are designed for near-term quantum computers with qubits arranged in two-dimensional arrays. Additionally, we introduce a feasible quantum arithmetic operation to compute the two's complement representation of signed integers. The proposed QALUs utilize only Pauli-X gates, CNOT gates, and CX (CSX) gates, and all two-qubit gates are operated between nearest neighbor qubits. Our work demonstrates a viable implementation of QALUs on near-term quantum computers, advancing towards scalable and resource-efficient quantum arithmetic operations.
Quantum computing (Q-computing) is a revolutionary technology that applies quantum mechanics (QM) to implement calculations significantly quicker than traditional computers. Q-computing employs Q-bits (qubits) rather than classical bits, which can take on a superposition state, making it possible to represent both 0 and 1 at once. This distinctive property allows qubits to perform multiple calculations simultaneously, making Q computers exponentially more powerful as more qubits are added, compared to the linear scaling of classical computers. However, challenges such as qubit instability and error rates remain significant obstacles to fully realizing this potential. A vital aspect of this technology is the development of Q arithmetic circuits, which act as the foundational blocks for efficiently executing Q algorithms. Q half-adder and full-adder circuits are integral to performing fundamental arithmetic operations within Q computers. In contrast to classical adders, Q adders rely on Q gates such as Controlled NOT (CNOT) and Toffoli gates. These gates exploit Q phenomena like entanglement and superposition, allowing for more efficient computations. The Q half-adder consists of two qubits and adds two single bits, producing a carry and sum output. It utilizes the CNOT gate to compute the sum and the Toffoli gate (controlled-controlled-NOT [CCNOT]) to compute the carry. The Q full-adder builds on this, adding three qubits to produce a sum and a carry output, further increasing computational capacity. Through the entanglement of qubits, these circuits allow for more parallelism and speed compared to classical adders. Q carry-look-ahead adders (QCLAs) and Q ripple-carry adders (QRCAs) are used to perform more complex arithmetic operations based on these half-adder and full-adder structures. Q arithmetic circuits have broad applications, boosting secure key generation in cryptography, speeding up matrix operations for faster model training in machine learning, and enabling more precise, efficient image transformations in Q image processing, benefiting fields like medical imaging and computer vision.