Challenges
Datasets
Workspaces
Papers
Discussions
Leaderboard
Log inSign up
Challenges
Datasets
Workspaces
Papers
Discussions
Leaderboard
Blog
Job Board
Q3AS

© 2026 Aqora Quantum S.A.S.

TermsPrivacyLegal Notice

IEEE International Conference on Quantum Computing and Engineering (QCE)

An FPGA-Accelerated Atom Sorting Unit for Neutral Atom Quantum Computers

Xiaorang Guo, Jonas Winklmann, Dirk Stober, Shicong Cao, Martin Schulz

Published Sep 15, 2024• 0 citations
Publisher

Abstract

Neutral atoms have been proven to be a promising physical platform for quantum computing because of their longer coherence time and good scalability. To operate neutral-atom quantum computers, an essential step before computation is to assemble the atoms as a defect-free array. This process is called atom rearrangement or atom sorting, which typically requires a long analysis time on classical computers. To optimize the sorting process, we propose a hardware-friendly sorting algorithm (oriented for FPGA acceleration) to be able to analyze the atom array with four independent quadrants and process each quadrant in parallel. Tested on a Xilinx ZCU216 FPGA, our design can finish the sorting analysis procedure with a 50$\times 50$loaded atoms array with around 1.0$\mu s$. Compared to the CPU implementation, we achieved an acceleration of around$50\times$speedup in algorithm analysis time. In addition, the design exhibits good scalability in execution time, making it suitable for large-scale quantum systems.

DOI
10.1109/qce60285.2024.10399

Related papers

Design of an FPGA-Based Neutral Atom Rearrangement Accelerator for Quantum Computing

Xiaorang Guo, Jonas Winklmann, Dirk Stober +2 more

Neutral atoms have emerged as a promising technology for implementing quantum computers due to their scalability and long coherence times. However, the execution frequency of neutral atom quantum computers is constrained by image processing procedures, particularly the assembly of defect-free atom arrays, which is a crucial step in preparing qubits (atoms) for execution. To optimize this assembly process, we propose a novel quadrant-based rearrangement algorithm that employs a divide-and-conquer strategy and also enables the simultaneous movement of multiple atoms, even across different columns and rows. We implement the algorithm on Field Programmable Gate Arrays (FPGAs) to handle each quadrant independently (hardware-level optimization) while maximizing parallelization. To the best of our knowledge, this is the first hardware acceleration work for atom rearrangement, and it significantly reduces the processing time. This achievement also contributes to the ongoing efforts of tightly integrating quantum accelerators into High-Performance Computing (HPC) systems. Tested on a Zynq RFSoC FPGA at 250 MHz, our hardware implementation is able to complete the rearrangement process of a 30 × 30 compact target array, derived from a 50 × 50 initial loaded array, in approximately 1.0 μs. Compared to a comparable CPU implementation and to state-of-the-art FPGA work, we achieved about 54 x and 300 x speedups in the rearrangement analysis time, respectively. Additionally, the FPGA-based acceleration demonstrates good scalability, allowing for seamless adaptation to varying sizes of the atom array, which makes this algorithm a promising solution for large-scale quantum systems.

arXiv:2411.12401•Design, Automation, and Test in Europe•Mar 31, 2025•3 citations

Highly-Parallel Atom-Detection Accelerator for Tweezer-Based Neutral Atom Quantum Computers

Jonas Winklmann, Yian Yu, Xiaorang Guo +2 more

Neutral atom quantum computers (NAQCs) are among the most promising computational platforms for quantum computing. Controlling and measuring individual atoms and their states, which often requires multiple imaging and image-analysis procedures, is typically the most time-consuming task during computation and contributes significantly to overall cycle times. To resolve this challenge, we propose a highly-parallel atom-detection accelerator for tweezer-based NAQCs. Our design builds on an existing state-reconstruction method and combines an algorithm-level optimization with a Field Programmable Gate Array (FPGA) implementation to maximize parallelism and reduce the run time of the image-analysis process. We identify and overcome several challenges for an FPGA implementation, such as introducing a prefetching mechanism to improve scalability and customizing bus transfers to support large bandwidths. Tested on a Xilinx UltraScale+ FPGA, our design can analyze a 256x256-pixel fluorescence image in just 115mus, achieving 34.9x and 6.3x speedups over the original and optimized CPU baseline, respectively. Moreover, our accelerator can maintain consistent resource utilization across various atom array sizes, contributing to the ongoing efforts toward scalable and fully integrated FPGA-based control systems for NAQCs.

quant-pharXiv:2604.00816•ACM/IEEE Design Automation Conference (DAC)•Apr 2, 2026•0 citations

Efficient Image Reconstruction Architecture for Neutral Atom Quantum Computing

Jonas Winklmann, Yian Yu, Xiaorang Guo +2 more

In recent years, neutral atom quantum computers (NAQCs) have attracted a lot of attention, primarily due to their long coherence times and good scalability. One of their main drawbacks is their comparatively time-consuming control overhead, with one of the main contributing procedures being the detection of individual atoms and measurement of their states, each occurring at least once per compute cycle and requiring fluorescence imaging and subsequent image analysis. To reduce the required time budget, we propose a highly-parallel atom-detection accelerator for tweezer-based NAQCs. Building on an existing solution, our design combines algorithm-level optimization with a field-programmable gate array (FPGA) implementation to maximize parallelism and reduce the run time of the image analysis process. Our design can analyze a 256$\times$256-pixel image representing a 10$\times$10 atom array in just 115 $μ$s on a Xilinx UltraScale+ FPGA. Compared to the original CPU baseline and our optimized CPU version, we achieve about 34.9$\times$ and 6.3$\times$ speedup of the reconstruction time, respectively. Moreover, this work also contributes to the ongoing efforts toward fully integrated FPGA-based control systems for NAQCs.

quant-pharXiv:2603.03149•Mar 4, 2026•0 citations

AtomFlow: An End-to-End FPGA-Based Control Architecture for Neutral Atom Quantum Computers

Xiaorang Guo, Jonas Winklmann, Vengkeat Chea +1 more

Neutral Atom Quantum Computing (NAQC) is an emerging modality for scalable quantum computation, valued for its long coherence times and the naturally identical atomic qubits. However, one of the main drawbacks is its slow execution rate, dominated by lengthy classical processing tasks, such as fluorescence imaging, cooling, and atom rearrangement. We address this bottleneck with AtomFlow, a field-programmable gate array (FPGA)-based control architecture that consolidates fluorescence-image analysis and a newly developed atom-rearrangement algorithm onto a single Zynq UltraScale+ device. By co-locating the two stages on the same board and emitting rearrangement moves in a streaming fashion as soon as they are computed, AtomFlow eliminates the round-trip latency of conventional host-mediated pipelines. Evaluated on a 16x16 atom array, AtomFlow achieves an end-to-end latency of 25.3 ms with a first-move latency of 4 ms and an average move generation of 1 ms. Furthermore, our scalability analysis demonstrates that the architecture can readily support larger atom arrays within a single-board resource budget.

quant-pharXiv:2607.11490•Jul 14, 2026•0 citations

Efficient Image Reconstruction Architecture for Neutral Atom Quantum Computing

Jonas Winklmann, Yian Yu, Xiaorang Guo +2 more

In recent years, neutral atom quantum computers (NAQCs) have attracted a lot of attention, primarily due to their long coherence times and good scalability. One of their main drawbacks is their comparatively time-consuming control overhead, with one of the main contributing procedures being the detection of individual atoms and measurement of their states, each occurring at least once per compute cycle and requiring fluorescence imaging and subsequent image analysis.To reduce the required time budget, we propose a highly-parallel atom-detection accelerator for tweezer-based NAQCs. Building on an existing solution, our design combines algorithm-level optimization with a field-programmable gate array (FPGA) implementation to maximize parallelism and reduce the run time of the image analysis process. Our design can analyze a 256×256-pixel image representing a 10×10 atom array in just 115 μs on a Xilinx UltraScale+ FPGA. Compared to the original CPU baseline and our optimized CPU version, we achieve about 34.9× and 6.3× speedup of the reconstruction time, respectively. Moreover, this work also contributes to the ongoing efforts toward fully integrated FPGA-based control systems for NAQCs.

Design, Automation, and Test in Europe•Apr 20, 2026•0 citations

ATLAS: Efficient Atom Rearrangement for Defect-Free Neutral-Atom Quantum Arrays Under Transport Loss

Otto Savola, Alexandru Paler

Neutral-atom quantum computers encode qubits in individually trapped atoms arranged in optical lattices. Achieving defect-free atom configurations is essential for high-fidelity quantum gates and scalable error correction, yet stochastic loading and atom loss during rearrangement hinder reliable large-scale assembly. This work presents ATLAS, an open-source atom transport algorithm that efficiently converts a randomly loaded $W \times W$ lattice into a defect-free $L \times L$ subarray while accounting for realistic physical constraints, including finite acceleration, transfer time, and per-move loss probability. In the planning phase, optimal batches of parallel moves are computed on a lossless virtual array; during execution, these moves are replayed under probabilistic atom loss to maximize the expected number of retained atoms. Monte Carlo simulations across lattice sizes $W=10$--$100$, loading probabilities $p_{\mathrm{occ}}=0.5$--$0.9$, and loss rates $p_{\mathrm{loss}}=0$--$0.05$ demonstrate fill rates above $99\%$ within six iterations and over $90\%$ atom retention at low loss. The algorithm achieves sublinear move scaling ($\propto M^{0.55}$) and linear growth of required initial size with target dimension, outperforming prior methods in robustness and scalability -- offering a practical path toward larger neutral-atom quantum arrays.

quant-pharXiv:2511.16303•Nov 21, 2025•0 citations
Neutral atoms have been proven to be a promising physical platform for quantum computing because of their longer coherence time and good scalability. To operate neutral-atom quantum computers, an essential step before computation is to assemble the atoms as a defect-free array. This process is called atom rearrangement or atom sorting, which typically requires a long analysis time on classical computers. To optimize the sorting process, we propose a hardware-friendly sorting algorithm (oriented for FPGA acceleration) to be able to analyze the atom array with four independent quadrants and process each quadrant in parallel. Tested on a Xilinx ZCU216 FPGA, our design can finish the sorting analysis procedure with a 50×50\times 50×50loaded atoms array with around 1.0μs\mu sμs. Compared to the CPU implementation, we achieved an acceleration of around50×50\times50×speedup in algorithm analysis time. In addition, the design exhibits good scalability in execution time, making it suitable for large-scale quantum systems.
Neutral atoms have emerged as a promising technology for implementing quantum computers due to their scalability and long coherence times. However, the execution frequency of neutral atom quantum computers is constrained by image processing procedures, particularly the assembly of defect-free atom arrays, which is a crucial step in preparing qubits (atoms) for execution. To optimize this assembly process, we propose a novel quadrant-based rearrangement algorithm that employs a divide-and-conquer strategy and also enables the simultaneous movement of multiple atoms, even across different columns and rows. We implement the algorithm on Field Programmable Gate Arrays (FPGAs) to handle each quadrant independently (hardware-level optimization) while maximizing parallelization. To the best of our knowledge, this is the first hardware acceleration work for atom rearrangement, and it significantly reduces the processing time. This achievement also contributes to the ongoing efforts of tightly integrating quantum accelerators into High-Performance Computing (HPC) systems. Tested on a Zynq RFSoC FPGA at 250 MHz, our hardware implementation is able to complete the rearrangement process of a 30 × 30 compact target array, derived from a 50 × 50 initial loaded array, in approximately 1.0 μs. Compared to a comparable CPU implementation and to state-of-the-art FPGA work, we achieved about 54 x and 300 x speedups in the rearrangement analysis time, respectively. Additionally, the FPGA-based acceleration demonstrates good scalability, allowing for seamless adaptation to varying sizes of the atom array, which makes this algorithm a promising solution for large-scale quantum systems.
Neutral atom quantum computers (NAQCs) are among the most promising computational platforms for quantum computing. Controlling and measuring individual atoms and their states, which often requires multiple imaging and image-analysis procedures, is typically the most time-consuming task during computation and contributes significantly to overall cycle times. To resolve this challenge, we propose a highly-parallel atom-detection accelerator for tweezer-based NAQCs. Our design builds on an existing state-reconstruction method and combines an algorithm-level optimization with a Field Programmable Gate Array (FPGA) implementation to maximize parallelism and reduce the run time of the image-analysis process. We identify and overcome several challenges for an FPGA implementation, such as introducing a prefetching mechanism to improve scalability and customizing bus transfers to support large bandwidths. Tested on a Xilinx UltraScale+ FPGA, our design can analyze a 256x256-pixel fluorescence image in just 115mus, achieving 34.9x and 6.3x speedups over the original and optimized CPU baseline, respectively. Moreover, our accelerator can maintain consistent resource utilization across various atom array sizes, contributing to the ongoing efforts toward scalable and fully integrated FPGA-based control systems for NAQCs.
In recent years, neutral atom quantum computers (NAQCs) have attracted a lot of attention, primarily due to their long coherence times and good scalability. One of their main drawbacks is their comparatively time-consuming control overhead, with one of the main contributing procedures being the detection of individual atoms and measurement of their states, each occurring at least once per compute cycle and requiring fluorescence imaging and subsequent image analysis. To reduce the required time budget, we propose a highly-parallel atom-detection accelerator for tweezer-based NAQCs. Building on an existing solution, our design combines algorithm-level optimization with a field-programmable gate array (FPGA) implementation to maximize parallelism and reduce the run time of the image analysis process. Our design can analyze a 256$\times256−pixelimagerepresentinga10256-pixel image representing a 10256−pixelimagerepresentinga10\times$10 atom array in just 115 μμμs on a Xilinx UltraScale+ FPGA. Compared to the original CPU baseline and our optimized CPU version, we achieve about 34.9×\times× and 6.3×\times× speedup of the reconstruction time, respectively. Moreover, this work also contributes to the ongoing efforts toward fully integrated FPGA-based control systems for NAQCs.
Neutral Atom Quantum Computing (NAQC) is an emerging modality for scalable quantum computation, valued for its long coherence times and the naturally identical atomic qubits. However, one of the main drawbacks is its slow execution rate, dominated by lengthy classical processing tasks, such as fluorescence imaging, cooling, and atom rearrangement. We address this bottleneck with AtomFlow, a field-programmable gate array (FPGA)-based control architecture that consolidates fluorescence-image analysis and a newly developed atom-rearrangement algorithm onto a single Zynq UltraScale+ device. By co-locating the two stages on the same board and emitting rearrangement moves in a streaming fashion as soon as they are computed, AtomFlow eliminates the round-trip latency of conventional host-mediated pipelines. Evaluated on a 16x16 atom array, AtomFlow achieves an end-to-end latency of 25.3 ms with a first-move latency of 4 ms and an average move generation of 1 ms. Furthermore, our scalability analysis demonstrates that the architecture can readily support larger atom arrays within a single-board resource budget.
In recent years, neutral atom quantum computers (NAQCs) have attracted a lot of attention, primarily due to their long coherence times and good scalability. One of their main drawbacks is their comparatively time-consuming control overhead, with one of the main contributing procedures being the detection of individual atoms and measurement of their states, each occurring at least once per compute cycle and requiring fluorescence imaging and subsequent image analysis.To reduce the required time budget, we propose a highly-parallel atom-detection accelerator for tweezer-based NAQCs. Building on an existing solution, our design combines algorithm-level optimization with a field-programmable gate array (FPGA) implementation to maximize parallelism and reduce the run time of the image analysis process. Our design can analyze a 256×256-pixel image representing a 10×10 atom array in just 115 μs on a Xilinx UltraScale+ FPGA. Compared to the original CPU baseline and our optimized CPU version, we achieve about 34.9× and 6.3× speedup of the reconstruction time, respectively. Moreover, this work also contributes to the ongoing efforts toward fully integrated FPGA-based control systems for NAQCs.
Neutral-atom quantum computers encode qubits in individually trapped atoms arranged in optical lattices. Achieving defect-free atom configurations is essential for high-fidelity quantum gates and scalable error correction, yet stochastic loading and atom loss during rearrangement hinder reliable large-scale assembly. This work presents ATLAS, an open-source atom transport algorithm that efficiently converts a randomly loaded W×WW \times WW×W lattice into a defect-free L×LL \times LL×L subarray while accounting for realistic physical constraints, including finite acceleration, transfer time, and per-move loss probability. In the planning phase, optimal batches of parallel moves are computed on a lossless virtual array; during execution, these moves are replayed under probabilistic atom loss to maximize the expected number of retained atoms. Monte Carlo simulations across lattice sizes W=10W=10W=10--100100100, loading probabilities pocc=0.5p_{\mathrm{occ}}=0.5pocc​=0.5--0.90.90.9, and loss rates ploss=0p_{\mathrm{loss}}=0ploss​=0--0.050.050.05 demonstrate fill rates above 99%99\%99% within six iterations and over 90%90\%90% atom retention at low loss. The algorithm achieves sublinear move scaling (∝M0.55\propto M^{0.55}∝M0.55) and linear growth of required initial size with target dimension, outperforming prior methods in robustness and scalability -- offering a practical path toward larger neutral-atom quantum arrays.