This paper presents the design, simulation, and fabrication process of a superconducting single qubit utilizing Josephson junctions in both planar and flip-chip architectures. The Xmon qubit, characterized by its cross-shaped coplanar waveguide structure and high scalability, is employed to demonstrate the enhancement in coherence, connectivity, and control speed. The Xmon qubit was modeled and validated using Python, Ansys HFSS, and Sonnet software. The fabrication process, including the transmission line and Josephson junction, is also introduced.
This paper presents the design, simulation, and fabrication process of a superconducting single qubit utilizing Josephson junctions in both planar and flip-chip architectures. The Xmon qubit, characterized by its cross-shaped coplanar waveguide structure and high scalability, is employed to demonstrate the enhancement in coherence, connectivity, and control speed. The Xmon qubit was modeled and validated using Python, Ansys HFSS, and Sonnet software. The fabrication process, including the transmission line and Josephson junction, is also introduced.
This work presents a comprehensive analytical and simulation-based study of superconducting quantum chip architectures, spanning both 2D planar and 3D-integrated designs. We first design and simulate a planar quantum chip layout using Qiskit Metal, which is imported into Ansys HFSS (High Frequency Structure Simulator) to construct a 3D model and perform electromagnetic simulations. A detailed analysis using Driven Modal, Eigenmode, Magnetostatic, and Q3D Capacitance Extraction solvers ensures our simulations accurately reflect physical behavior. The results are validated against analytical models from microwave engineering. pyEPR (Python Energy Participation Ratio) is used to extract key quantum metrics, including eigenfrequencies, quality factors, decoherence times, anharmonicity, cross-Kerr interactions, and participation ratios. Building on this planar design, we extend our study to a 3D-integrated flip-chip architecture featuring two superconducting qubits fabricated on separate high-resistivity silicon substrates. Using HFSS and analytical modeling, we show that detuned qubits maintain stable eigenfrequencies, quality factors, decoherence times, anharmonicity, and cross-Kerr interactions over varying substrate separation values. However, the introduction of dielectric loss tangents reduces quality factors which degrades coherence times and introduces an additional dephasing. These findings highlight the potential of 3D quantum integration, given minimal material imperfections.The planar and 3D designs together form a cohesive investigation into next-generation quantum hardware, with the 2D layout currently taped-out and under fabrication.
This work presents a combined analytical and simulation-based study of a 3D-integrated quantum chip architecture. We model a flip-chip-inspired structure by stacking two superconducting qubits fabricated on separate high-resistivity silicon substrates through a dielectric interlayer. Utilizing rigorous Ansys High-Frequency Structure Simulator (HFSS) simulations and analytical models from microwave engineering, we evaluate key quantum metrics such as eigenfrequencies, Q-factors, decoherence times, anharmonicity, cross-Kerr, participation ratios, and qubit coupling energy to describe the performance of the quantum device as a function of integration parameters. The integration parameters include the thickness and the quality of the dielectric interlayer. For detuned qubits, these metrics remain mostly invariant with respect to the substrate separation. However, introducing dielectric interlayer loss decreases the qubit quality factor, which consequentially degrades the relaxation time of the qubit. It is found that for the structure studied in this work, the stacked chip distance can be as small as 0.5 mm. These findings support the viability of 3D quantum integration as a scalable alternative to planar architectures, while identifying key limitations in qubit coherence preservation due to lossy interlayer materials.
We have demonstrated superconducting interconnect technologies that enable a variety of flip-chip 3D integrated structures and packages compatible with high-coherence superconducting qubits. Superconducting indium micro-bumps and underbump metal (UBM) were used to join superconducting qubit chips to superconducting readout and control modules while maintaining high qubit coherence (T1, T2,echo> 20 μs) in the presence of capacitive and inductive coupling between the chips. Scanning electron microscope, X-ray, infrared and confocal microscopy were used to investigate the micro-structure, alignment accuracy, and parallelism of flip-chip qubits. The superconducting readout and control modules can accommodate both niobium and aluminum-based circuit and amplifier fabrication processes, including shadow-evaporated aluminum or Nb/Al-AlOx/Nb trilayer Josephson junctions (JJs). We present results for up to 16 active superconducting chips having trilayer junctions bonded to a passive superconducting module. The I-V characteristics and switching behavior were measured for flip-chip-connected JJ arrays with 40-20,000 JJs. Our approach maintained chip-level junction critical current and qubit coherence, demonstrating it to be a viable approach to building larger quantum computing systems. This paper also discusses packaging approaches to developing a quantum-to-classical interface in a cryogenic environment with multiple temperature stages.
We introduce a simplified fabrication technique for Josephson junctions and demonstrate superconducting Xmon qubits with T1 relaxation times averaging above 50 μs (Q>1.5×106). Current shadow-evaporation techniques for aluminum-based Josephson junctions require a separate lithography step to deposit a patch that makes a galvanic, superconducting connection between the junction electrodes and the circuit wiring layer. The patch connection eliminates parasitic junctions, which otherwise contribute significantly to dielectric loss. In our patch-integrated cross-type junction technique, we use one lithography step and one vacuum cycle to evaporate both the junction electrodes and the patch. This eliminates a key bottleneck in manufacturing superconducting qubits by reducing the fabrication time and cost. In a study of more than 3600 junctions, we show an average resistance variation of 3.7% on a wafer that contains forty 0.5×0.5-cm2 chips, with junction areas ranging between 0.01 and 0.16 μm2. The average on-chip spread in resistance is 2.7%, with 20 chips varying between 1.4% and 2%. For the junction sizes used for transmon qubits, we deduce a wafer-level transition-frequency variation of 1.7%–2.5%. We show that 60%–70% of this variation is attributed to junction-area fluctuations, while the rest is caused by tunnel-junction inhomogeneity. Such high frequency predictability is a requirement for scaling-up the number of qubits in a quantum computer.
Scalable superconducting qubit architectures demand qubits with long coherence times—a critical prerequisite for developing practical quantum computers. To achieve a compact circuit footprint, we have designed a superconducting qubit featuring a meander-structured coplanar waveguide capacitor, termed the “Smon.” Numerical simulations of the electric field distribution demonstrate that the Smon exhibits a significantly lower energy participation ratio (EPR) than both Xmon qubits and conventional rectangular planar transmon qubits. For an in situ comparison between Smons and conventional rectangular planar transmons, we propose a two-dimensional (2D) hybrid qubit array test structure. The capacitor electrodes of the devices are fabricated using tantalum. Measurements of the Smon’s coherence properties yield an energy relaxation time ( T 1 ) ranging from 30 to 359 µs and a dephasing time ( T 2 ) between 18 and 20 µs. These results confirm that superconducting quantum circuits with enhanced integration density and long coherence times are experimentally feasible, thereby offering a viable pathway toward high-performance large-scale superconducting quantum computers.
The strong anharmonicity and high coherence times inherent to fluxonium superconducting circuits are beneficial for quantum information processing. In addition to requiring high-quality physical qubits, a quantum processor needs to be assembled in a manner that minimizes crosstalk and decoherence. In this paper, we report on fluxonium qubits packaged in a flip-chip architecture, where a classical control and readout chip is bump bonded to the quantum chip, forming a multichip module. The modular approach allows for improved connectivity between the qubits and control and readout elements, and separate fabrication processes. We characterize the coherence properties of the individual fluxonium qubits, demonstrate high-fidelity single-qubit gates with 6-ns microwave pulses (without DRAG), and identify the main decoherence mechanisms to improve on the reported results.