Reversible computing has gained increasing attention as a prospective solution for energy dissipation, particularly in quantum computing. As the first practical reversible logic gate using adiabatic superconducting devices, the reversible quantum-flux-parametron (RQFP) has been experimentally demonstrated in logical and physical reversibility. However, the circuit design of RQFP logic poses enormous challenges due to its distinctive logic function and structure. Furthermore, the circuit scale severely restricts the applicability of the existing exact logic synthesis method for RQFP logic. Therefore, this paper proposes RCGP, an automatic synthesis framework based on efficient Cartesian genetic programming, to generate large RQFP logic circuits. RCGP considers the characteristics of RQFP logic circuits to minimize the number of gates and garbage outputs. Meanwhile, RCGP combines circuit simulation with formal verification to assess the functional equivalence between the parent and its offspring. Experimental results on reversible logic benchmarks demonstrate the effectiveness of RCGP.
Reversible computing has gained increasing attention as a prospective solution for energy dissipation, particularly in quantum computing. As the first practical reversible logic gate using adiabatic superconducting devices, the reversible quantum-flux-parametron (RQFP) has been experimentally demonstrated in logical and physical reversibility. However, the circuit design of RQFP logic poses enormous challenges due to its distinctive logic function and structure. Furthermore, the circuit scale severely restricts the applicability of the existing exact logic synthesis method for RQFP logic. Therefore, this paper proposes RCGP, an automatic synthesis framework based on efficient Cartesian genetic programming, to generate large RQFP logic circuits. RCGP considers the characteristics of RQFP logic circuits to minimize the number of gates and garbage outputs. Meanwhile, RCGP combines circuit simulation with formal verification to assess the functional equivalence between the parent and its offspring. Experimental results on reversible logic benchmarks demonstrate the effectiveness of RCGP.
Reversible computing, deriving its inspiration from Landauer's principle, has captured significant interest as a promising technology for logic operations without energy dissipation. The reversible quantum-flux-parametron (RQFP) stands as the first practical reversible logic gate using adiabatic superconducting devices, whose logical and physical reversibility has been experimentally demonstrated. However, due to its unique logic function and structure, the design of RQFP logic circuits is a highly challenging task. At present, there are no automated design tools available for RQFP logic. Therefore, this paper proposes the first exact logic synthesis algorithm for RQFP logic. It formulates the synthesis problem as the Boolean satisfiability problem and subsequently constructs and calls upon the incremental propositional logic model iteratively for optimal synthesis with the least number of gates and garbage outputs. Experimental results on the reversible logic benchmark from RevLib demonstrate the effectiveness of the proposed algorithm.
Abstract Reversible logic circuits can perform logic operations in a thermodynamically reversible manner, or without energy dissipation. The reversible quantum-flux-parametron (RQFP) is a reversible logic gate using adiabatic superconductor logic. In the present study, we design and demonstrate a reversible full adder (RFA) using RQFP gates in order to demonstrate that RQFP gates can be used as building blocks to design reversible logic circuits. An analysis of the time evolution of the phase differences across the Josephson junctions in the RFA showed that its logic state can change quasi-statically during a logic operation. Calculation of the energy dissipation of the RFA showed that it decreases in proportion to the operating frequency. These numerical calculation results ensure that the RFA is thermodynamically and logically reversible. In addition, we experimentally demonstrated correct operation of the RFA for all input data combinations. These results reveal that logic circuits designed using RQFP gates can perform reversible computing, i.e. RQFP gates can be used as building blocks of reversible logic circuits.
In the recent years reversible logic circuits have gained a remarkable interest in the light of advancements made in quantum computation. The promise of theoretically zero power consumption is a major driving force for researchers to develop circuits using this logic. Synthesis of reversible logic and generating reversible logic circuit automatically with lower cost always has been a challenging task as reducing the search space is one of the major issues in the synthesis process using permutation. In this work, we proposed an Adaptive Genetic Algorithm (AGA) for synthesizing reversible logic circuits. NCT (NOT, CNOT, Toffoli) gate based library has been considered for synthesis of reversible logic circuits (RLC). The proposed algorithm produces a cascade of Toffoli gates for a given reversible specification of a circuit. Comparison of experimental results for several benchmark circuits shows that proposed evolutionary algorithm enables optimal or near-optimal solutions with lesser Gate Counts.
Josephson junction-based superconducting logic families have been proposed to implement analog and digital signals, which can achieve low energy dissipation and ultra-fast switching speed. There are two representative technologies: DC-biased RSFQ (rapid single flux quantum) technology and its variants that achieve a verified speed of 370 Ghz, and AC-biased AQFP (adiabatic quantum-flux-parametron) that achieves an energy dissipation near quantum limits. Despite extraordinary characteristics of the superconducting logic families, many technical challenges remain, including the choice of circuit fabrics and architectures that utilize the SFQ technology and the development of effective design automation methodologies and tools. This paper presents our work on developing design flows and tools for DC- and AC-biased SFQ circuits, leveraging unique characteristics and design requirements of the SFQ logic families. More precisely, physical design algorithms, including placement, clock tree routing, and signal routing algorithms targeting RSFQ circuits are presented first. Next, a majority/minority gate-based automatic synthesis framework targeting AQFP logic circuits is described. Finally, experimental results to demonstrate the efficacy of the proposed framework and tools are presented.
Considering the relentless progress in the miniaturization of electronic devices and the need to reduce energy consumption, technical challenges in the synthesis of circuit design solutions have become evident. According to Moore's Law, the reduction of transistor sizes to the atomic scale faces physical limits, which complicate further development. Additionally, reducing transistor sizes causes current leakage, leading to increased thermal noise, which can disrupt the proper functioning of digital devices. A promising solution to these problems is the application of reversible logic in circuit design. Reversible logic allows for a reduction in energy and information losses because logical reversible operations are performed without loss. The research synthesized optimal reversible circuits based on reversible gates using evolutionary algorithms and compare them with existing analogues. The focus of this study is on logical circuits built using reversible gates, which can significantly reduce energy losses, which is critical for modern and future electronic devices. The synthesis of reversible circuits is closely related to quantum computing, where quantum gates also possess a reversible nature. This enables the use of synthesis methods to create quantum reversible logical computing devices, which in turn promotes the development of quantum technologies. The study focuses on the application of evolutionary artificial intelligence algorithms, specifically genetic algorithms and ant colony optimization algorithms, for the optimal synthesis of reversible circuits. As a result, a detailed description of the key concepts of the improved algorithms, simulation results, and comparison of the two methods is provided. The efficiency of the reversible device synthesis was evaluated using the proposed implementation of the genetic algorithm and the ant colony optimization algorithm. The obtained results were compared to existing analogs and verified using the Qiskit framework in the IBM quantum computing laboratory. The conclusions describe the developed algorithms, which demonstrate high efficiency in solving circuit topology optimization problems. A genetic algorithm was developed, featuring multi-component mutation and a matrix approach to chromosome encoding combined with Tabu search to avoid local optima. The ant colony optimization algorithms were improved, including several changes to the proposed data representation model, structure, and operational principles of the synthesis algorithm, enabling effective synthesis of devices on the NCT basis along with Fredkin gates. An improved structure for storing and using pheromones was developed to enable multi-criteria navigation in the solution space.
We have been developing the adiabatic quantum-flux-parametron (AQFP), which is an ultra-low-power superconductor logic family. To date, somewhat large AQFP circuits, such as a 4-bit microprocessor and an 8-bit adder, have been demonstrated. To design much larger devices, space-efficient logic circuits are needed. Therefore, in a previous study, we proposed the directly coupled quantum-flux-parametron (DQFP). DQFP circuits propagate data via a direct connection, whereas AQFP circuits propagate data via transformers, which can occupy a large part of the gate area. Thus, DQFP circuits are more space-efficient than AQFP circuits. In this study, we optimized the circuit parameters for DQFP logic cells using numerical simulations from the viewpoint of excitation current margins, component parameter margins, and energy dissipation. We also designed the physical layout of the optimized DQFP cells, fabricated chips, and demonstrated basic DQFP circuits with the optimized cells.