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Quantum Information Processing with industry-based Silicon devices and Dopants

Eva Dupont-Ferrier

Published Jan 17, 2023• 0 citations
OpenAlex

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The reproducibility and scalability associated to the CMOS industry have led to a large increase in the use of siliconfor other applications as well, most notably the surge of silicon integrated photonics during the past decade.However, it is less well-known that this material cannot only host electronic and photonic circuits, but alsobecomes superconducting when hyper doped with Boron above 1 at.%.[1] We are currently working on buildingall-Si devices that combine superconductivity with integrated photonics to directly link quantum circuits to fast,low noise optical waveguides.Achieving the concentration required for superconductivity in silicon-on-insulator (SOI) used for photonic circuitsposes multiple challenges, as they can only be obtained via an out-of-equilibrium processes. Nanosecond laserdoping, that induces an ultra-fast liquid-phase epitaxy enables boron incorporation far above the solubility limit(up to 8 at.% in bulk silicon.[2]) The reduced heat dissipation through the 1-3 μm thick buried oxide (BOX)compared to bulk silicon leads to a large reduction of the recrystallization velocity from 4 m/s to 2 m/s and thus toa lower charge carrier concentration. Additionally, the higher thermal budget enhances dopant diffusion, leadingto unwanted deactivation of the boron.By combining experiments and simulations, we investigated the influence of the silicon and BOX thicknesses(notably Si/SiO2 = 220/2000, 700/3000 and 88/145 nm) on recrystallization dynamics and electrical properties. Itwas shown that the silicon thickness is the dominant factor for the melting threshold, whereas the BOX thicknessstrongly impacts the thermal budget, leading to dopant deactivation. As a result, both the total stack and thechosen laser energy determine the final recrystallization velocity. For the 700/3000 nm SOI reducing the layerthickness from 250 to 80 nm lowers the thermal budget and hence improves the layer quality, leading to a doublingof the charge carrier concentration. This enables superconductivity with a critical temperature of 0.5 K and, to ourbest knowledge, constitutes the first demonstration of superconductivity on photonics-compatible SOI.For SOI with thinner BOX layers, typical substrates for microelectronics applications such as FD-SOI MOSFET, thethermal confinement is smaller, and high dopant activation is systematically achieved. Furthermore, it has beenshown that implantation followed by nanosecond laser annealing can reach similar active concentrations as in-situdoping [3], allowing the implementation of superconducting devices on 'microelectronics' SOI with CMOScompatible techniques. These results indicate a promising potential for the industrial fabrication of hybrid circuitscombining integrated photonics and superconductive silicon.

•Jun 1, 2026•0 citations
We present a scalable strategy to manufacture quantum computer devices, by encoding quantum information in the combined electron-nuclear spin state of individual ion-implanted phosphorus dopant atoms in silicon. Our strategy allows a typical pitch between quantum bits of order 200 nm, and retains compatibility with the standard fabrication processes adopted in classical CMOS nanoelectronic devices. We theoretically predict fast and high-fidelity quantum logic operations, and present preliminary experimental progress towards the realization of a “flip-flop” qubit system.
There is a worldwide race to build a computer which exploits the counterintuitive principles of quantum mechanics. Silicon is one of the most promising platforms for emerging quantum information technologies for two reasons: one, it possesses many of the key desirable criteria for low-error quantum information processing, and two, the microelectronics industry has decades of experience with producing ultrapure silicon and nanoscale silicon devices, which makes silicon-based quantum devices attractive for future commercial integration. This paper reviews a selection of silicon-based quantum computer design proposals, their technological requirements, and explores recent experimental progress towards their realisation.
The reproducibility and scalability associated to the CMOS industry have led to a large increase in the use of siliconfor other applications as well, most notably the surge of silicon integrated photonics during the past decade.However, it is less well-known that this material cannot only host electronic and photonic circuits, but alsobecomes superconducting when hyper doped with Boron above 1 at.%.[1] We are currently working on buildingall-Si devices that combine superconductivity with integrated photonics to directly link quantum circuits to fast,low noise optical waveguides.Achieving the concentration required for superconductivity in silicon-on-insulator (SOI) used for photonic circuitsposes multiple challenges, as they can only be obtained via an out-of-equilibrium processes. Nanosecond laserdoping, that induces an ultra-fast liquid-phase epitaxy enables boron incorporation far above the solubility limit(up to 8 at.% in bulk silicon.[2]) The reduced heat dissipation through the 1-3 μm thick buried oxide (BOX)compared to bulk silicon leads to a large reduction of the recrystallization velocity from 4 m/s to 2 m/s and thus toa lower charge carrier concentration. Additionally, the higher thermal budget enhances dopant diffusion, leadingto unwanted deactivation of the boron.By combining experiments and simulations, we investigated the influence of the silicon and BOX thicknesses(notably Si/SiO2 = 220/2000, 700/3000 and 88/145 nm) on recrystallization dynamics and electrical properties. Itwas shown that the silicon thickness is the dominant factor for the melting threshold, whereas the BOX thicknessstrongly impacts the thermal budget, leading to dopant deactivation. As a result, both the total stack and thechosen laser energy determine the final recrystallization velocity. For the 700/3000 nm SOI reducing the layerthickness from 250 to 80 nm lowers the thermal budget and hence improves the layer quality, leading to a doublingof the charge carrier concentration. This enables superconductivity with a critical temperature of 0.5 K and, to ourbest knowledge, constitutes the first demonstration of superconductivity on photonics-compatible SOI.For SOI with thinner BOX layers, typical substrates for microelectronics applications such as FD-SOI MOSFET, thethermal confinement is smaller, and high dopant activation is systematically achieved. Furthermore, it has beenshown that implantation followed by nanosecond laser annealing can reach similar active concentrations as in-situdoping [3], allowing the implementation of superconducting devices on 'microelectronics' SOI with CMOScompatible techniques. These results indicate a promising potential for the industrial fabrication of hybrid circuitscombining integrated photonics and superconductive silicon.