To build large-scale superconducting quantum computers, it is crucial to develop cryogenic qubit controllers that can manipulate many qubits inside a dilution refrigerator. In this paper, we report the recent progress and challenges of qubit controllers. Specifically, we review various qubit controllers composed of cryogenic complementary metal-oxide-semiconductor (cryo-CMOS) logic and superconductor logic (such as single-flux-quantum logic and adiabatic quantum-flux-parametron logic). A detailed comparison of the qubit controllers reveals the advantages and disadvantages of each controller and indicates future challenges for both cryo-CMOS and superconductor logic-based controllers.
To build large-scale superconducting quantum computers, it is crucial to develop cryogenic qubit controllers that can manipulate many qubits inside a dilution refrigerator. In this paper, we report the recent progress and challenges of qubit controllers. Specifically, we review various qubit controllers composed of cryogenic complementary metal-oxide-semiconductor (cryo-CMOS) logic and superconductor logic (such as single-flux-quantum logic and adiabatic quantum-flux-parametron logic). A detailed comparison of the qubit controllers reveals the advantages and disadvantages of each controller and indicates future challenges for both cryo-CMOS and superconductor logic-based controllers.
Quantum computing holds the potential to solve problems beyond the capabilities of classical computers. However, realizing practical large-scale quantum computers faces critical challenges, including the key bottleneck in wiring quantum processors operating at cryogenic temperatures to their room temperature control electronics. This article explores cryo-CMOS ICs as an enabling technology to circumvent such a wiring bottleneck. After reviewing the basics of quantum computing and the behavior of CMOS devices at cryogenic temperatures, the requirements for the interface electronics for superconducting and semiconductor qubits are discussed, and state-of-the-art cryo-CMOS circuit solutions are briefly described, including a few hints to other qubit platforms. Finally, the article concludes with an overview of future challenges to be addressed to realize the vision of cryo-CMOS technology as an enabler of large-scale quantum computers with practical applications.
Quantum computing promises an exponentially higher computational power than classical computers; although all the building blocks have become available, certain constraints still prevent quantum advantage. The fundamental challenge in building a practical quantum computer is integrating thousands of highly coherent qubits with the control and readout electronics. The need for a high‐coherence qubit drives the effort for quantum error correction algorithms to create fault‐tolerant quantum systems. Error correction becomes tangible in a quantum processor only in large numbers of qubits. Thus, the other challenge is reducing the number of physical interconnects (coaxial lines) between the quantum–classical interface and bulky room‐temperature electronics. To interface thousands of qubits, interconnects can be reduced by bringing the control and readout electronics near the quantum processor. Cryogenic complementary metal–oxide–semiconductor (CMOS) technology has been an ideal candidate for this purpose. Integrated control and readout at cryogenic temperatures require low power dissipation circuit designs and techniques such as frequency‐division multiplexing (FDM) due to the finite cooling power of a dilution refrigerator. Herein, an overview of each building block in a superconducting quantum computer is provided, focusing on scalability. Furthermore, this article is concluded with an outlook discussing current challenges and future directions for the scalable superconducting control and readout.
Abstract Realizing a practically useful superconducting quantum computer will require a dramatic scale-up of quantum control electronics to meet the growth in required qubit counts. Conventional rack-based room-temperature control electronics impose severe constraints on wiring density, cost, and system footprint, creating a barrier to large-scale and fault-tolerant quantum computing. Here we demonstrate a hybrid quantum control architecture that combines cryogenic complementary metal-oxide semiconductor (cryo‑CMOS) application-specific integrated circuits (ASICs) for two‑qubit flux control with room‑temperature radio‑frequency electronics for single‑qubit control and readout. The resulting system achieves high density and scalable quantum control without compromising two‑qubit gate fidelity. Deployed on a 156‑qubit quantum processor, the cryo-CMOS subsystem achieves two‑qubit gate errors at the {10}^{-3} level, with a best randomized benchmarking error per gate of 8.4\times{10}^{-4}, stable operation over multi‑day timescales, and no measurable performance degradation as we increase the temperature of the cryo-CMOS ASICs from 7 to 20 K. Thermal analysis identifies cryo-CMOS chip operation near 20 K as a favorable regime, enabling efficient cooling of a large number of channels per cryostat. Compared against rack‑based flux-control, the cryo-CMOS subsystem achieves statistically indistinguishable two-qubit gate fidelities under matched gate settings and enables a tenfold improvement in system spatial footprint. These results establish cryo‑CMOS flux control as a practical and scalable foundation for large‑scale and fault-tolerant superconducting quantum systems.
A systematic research on the development of cryogenic complementary metal-oxide semiconductor (cryo-CMOS) circuits, for implementing the required control electronics to manipulate the quantum bit (qubit) state, is performed over the last few years. Scalability constitutes a key term regarding the evolution of quantum computing from theory to practical application and CMOS technology has been proven to be a promising candidate for implementing the coveted scalable next-generation quantum computers (QCs). Mixed-signal blocks, used for uniting the analog and digital domains, play a key role in the efficient functionality of the qubit control/readout system, thus there is an ever-increasing interest in their high-performance circuit realization. The critical challenge in this venture is to achieve efficient cryogenic operation at low temperatures, i.e., close to the qubit around 4 K, simultaneously keeping power requirements at low values. An overview and comparison of the cryo-CMOS Digital-to-Analog converter (DAC) and Analog-to-Digital converter (ADC) circuit implementations for quantum computing applications that heretofore have been proposed in the literature is presented in this work. A discussion on the challenges and future strategic steps that are henceforth required to proceed toward the development of a functional scalable quantum computer is also conducted.
A fault tolerant scalable quantum computer requires more than 1000 Qubits to perform real time state correction and to improve the Qubit coherence time. The dense wiring connections required between the quantum processor placed at a 100 mK temperature and the room temperature control and readout electronics serve as a limiting factor in this system. Qubit control and readout electronics operating at 4 K temperature, placed closer to a quantum processor inside the dilution refrigerator avoids the dense wiring connections to room temperature electronics, and hence, serve as a potential solution to realize a scalable quantum computer. However, with no CMOS process technology models available at cryogenic temperatures, the design of a fully integrated, ultra-low power Qubit control and readout electronics at a sub-1 mW power consumption proves to be extremely challenging. In recent years, there has been a huge rise in interest among the research communities to understand and solve the device and circuit level challenges at deep cryogenic temperatures. This paper presents an overview of the recently published active and passive device nonidealities, circuit design challenges and solutions, and the future research directions in the Qubit control and readout electronics operating at deep cryogenic temperatures.
Quantum computers can provide exponential speedup in solving certain computational problems pertaining to drug discovery, cybersecurity, weather forecasting, etc. Although a quantum computer with just 50-qubits has been shown to surpass the computing power of the best supercomputers in specific applications, millions of qubits would be required for useful practical applications. One of the biggest obstacles in scaling from 50 qubits to millions of qubits is the interconnect bottleneck between solid-state qubits operating at 20 milliKelvin inside a dilution refrigerator and control electronics outside the dilution refrigerator connected via long coaxial cables. A 50-qubit processor requires hundreds of cables, digital to analog converters, mixers and amplifiers, clearly challenging the scalability of the system. The goal of this research is to build scalable quantum computers by operating CMOS control electronics inside the dilution refrigerator in proximity to quantum processors. The dissertation covers a broad aspect of cryogenic integrated circuit design spanning across devices, circuits and systems.