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Proceedings - International Symposium on Computer Architecture/Proceedings

QIsim: Architecting 10+K Qubit QC Interfaces Toward Quantum Supremacy

Dongmoon Min, Junpyo Kim, Junhyuk Choi, Ilkwon Byun, Masamitsu Tanaka, Koji Inoue, Jangwoo Kim

Published Jun 16, 2023• 14 citations
Publisher

Abstract

A 10+K qubit Quantum-Classical Interface (QCI) is essential to realize the quantum supremacy. However, it is extremely challenging to architect scalable QCIs due to the complex scalability trade-offs regarding operating temperatures, device and wire technologies, and microarchitecture designs. Therefore, architects need a modeling tool to evaluate various QCI design choices and lead to an optimal scalable QCI architecture.

DOI
10.1145/3579371.3589036

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A 10+K qubit Quantum-Classical Interface (QCI) is essential to realize the quantum supremacy. However, it is extremely challenging to architect scalable QCIs due to the complex scalability trade-offs regarding operating temperatures, device and wire technologies, and microarchitecture designs. Therefore, architects need a modeling tool to evaluate various QCI design choices and lead to an optimal scalable QCI architecture.
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Challenges at the quantum-classical interface are examined with the goal of architecting a scaled-up quantum computer comprising many thousands of qubits. Separating the distinct sub-systems of the interface that perform readout and control, general arguments are given for why distributing the components of these sub-systems over significant distances and across large temperature gradients presents a major challenge to scaling-up the technology. Largely addressing these issues, an architecture for the interface that leverages cryo-CMOS circuits proximal to the quantum plane is motivated, leveraging protocols that enable massively-parallel readout of qubits via frequency multiplexing.
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This demonstration shows a Quantum-Classical interface (QC-IF) for quantum computing implemented on multiple FPGAs. Quantum computers need a controller to transmit/receive microwave to/from quantum devices. In order to explore various quantum devices, the controller requires flexibility to transmit/receive various wave shapes. In addition to that, scalability is also required for large-scale quantum computers. FPGAs are attractive platforms; however, some challenges exist in implementing QC-IF on FPGAs in terms of required specifications from physics, such as treating data and realizing scalability. This work demonstrates an implementation of QC-IF on FPGA with high bandwidth memory to treat large-volume data in high throughput. Furthermore, the IEEE1588-like clock synchronization mechanism is implemented to make multiple FPGAs synchronized.
The convergence of Very Large Scale Integration (VLSI) technology with quantum computing systems heralds a new era in computational capabilities. This article explores the evolving role of VLSI in facilitating scalable, reliable, and efficient quantum computing architectures. Key challenges such as integration of quantum bits (qubits) with classical control electronics, minimization of noise, and low-temperature operation constraints are discussed. The paper highlights emerging VLSI design methodologies tailored for quantum systems and presents future directions to realize hybrid quantum-classical chips. This integration promises breakthroughs in computational speed, energy efficiency, and system miniaturization essential for the next generation of computing technologies.