Architectures for Quantum Information Processing

Suryansh Upadhyay, Mahabubul Alam, Swaroop Ghosh

Liang Chen, Wei Wan, Yi Xie +2 more

In this paper we try to develop a scalable surface-electrode architecture for ion trap quantum information processing. The confinement of the ions by the rf pseudopotential and the movement of the ions by changing the rf pseudopotential are investigated by numerical simulation. Particular concern is paid to the +-shaped junction, which is the connection of different components of the architecture, and also on the place which yields heat and escaping ions. We show the feasibility of fabricating and operating on the architecture for quantum information processing with currently available technology.

Mukai Hiroto, ムカイ ヒロト, Mukai Hiroto

Emil Grovn, Matias Bundgaard-Nielsen, Jesper Mørk +2 more

A fundamental challenge in photonics-based deterministic quantum information processing is to realize key transformations on time scales shorter than those of detrimental decoherence and loss mechanisms. This challenge has been addressed through device-focused approaches that aim to increase nonlinear interactions relative to decoherence rates. In this work, we adopt a complementary architecture-focused approach by proposing a recirculating quantum photonic network (RQPN) that minimizes the duration of quantum information processing tasks, thereby reducing the requirements on nonlinear interaction rates. The RQPN consists of a network of all-to-all connected nonlinear cavities with dynamically controlled waveguide couplings, and it processes information by capturing a photonic input state, recirculating photons between the cavities, and releasing a photonic output state. We demonstrate the RQPN's architectural advantage through two examples: first, we show that processing all qubits simultaneously yields faster operations than single- and two-qubit decompositions of the three-qubit Toffoli gate. Second, we demonstrate implementations of a measurement-free correction for single-photon loss, achieving up to seven-fold speedups and significantly improved hardware efficiency relative to state-of-the-art architecture proposals. Our work shows that a single hardware-efficient recirculating architecture substantially reduces the temporal overhead of multi-qubit gates and quantum error correction, thereby lowering the barrier to experimental realizations of deterministic photonic quantum information processing.

Linsen Li, Lorenzo De Santis, Isaac Harris +7 more

We demonstrate a scalable quantum information processing architecture consisting of a planar array of tin-vacancy (SnV) centers, tunable across a thousand diamond cavities integrated on a control chip based on a commercial foundry process.

Hansika Weerasena, Prabhat Mishra