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Lecture notes in electrical engineering

Quantum Fault-Tolerant Implementation of a Majority-Based 4-Bit BCD Adder

Laxmidhar Biswal, N. P. Maity, Hafizur Rahaman

Published Jan 1, 2023• 1 citation
Publisher
DOI
10.1007/978-981-99-0055-8_4

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Reversible Logic is an emerging technology; it has hellocious applications in various fields. Reversible logic implementation reduces loss of entropy because of bit manipulations. . In this work we present a novel design of reversible 2 DIGIT BCD ADDER using INTEGRATED QUBIT GATES. The reversible BCD adder is designed from 2*2 control V, Control V+, CNOT, MTSG,FREDKIN(4),FEYMAN, INTEGRATED QUBIT GATES (1).The design of proposed reversible adder- requires minimum quantum cost ,delay by maintaining ancilla inputs and garbage outputs.

•Jan 1, 2014•0 citations
Reversible logic circuits have received emerging attentions in recent years. Reversible logic is widely applied in some new technical fields, such as quantum computing, nanocomputing and optical computing and so on. In this paper, three fault tolerant gates are proposed, ZPL gate, ZQC gate and ZC gate. By using the proposed gates, fault tolerant quantum and reversible BCD adder and skip carry BCD adder are designed, which overcome the limitations of the existing methods. The proposed reversible BCD adders have also parity-preserving property. They are better than the existing counterparts, especially in the quantum cost. Proposed designs have been compared with existing designs with respect to the number of gates, number of garbage outputs and quantum cost.
Quantum computing has the potential to transform modern computation by offering exponential advantages in areas such as cryptography, optimization, and intelligent data processing. To effectively realize these advantages, particularly in fault-tolerant and Noisy Intermediate-Scale Quantum (NISQ) environments, quantum circuits must be both resource-efficient and error-resilient. This paper presents a novel Binary-Coded Decimal (BCD) to Excess-3 code converter designed exclusively using the Clifford+T gate set, which is widely supported by fault-tolerant quantum hardware. The proposed design eliminates conventional 4-bit reversible adder-based implementations and instead employs an optimized logic structure based on Clifford+T-decomposed Peres gates. By leveraging Temporary Logical-AND gates and CNOT operations, the circuit achieves reduced T-count, circuit depth, and quantum cost as key metrics in fault-tolerant quantum computation. Functional correctness is verified through IBM Qiskit, Version 2.1 simulations for all valid BCD inputs. The proposed converter serves as a scalable and hardware-compatible arithmetic building block for resource-aware and AI-oriented quantum architectures.
Reversible Logic is an emerging technology; it has hellocious applications in various fields. Reversible logic implementation reduces loss of entropy because of bit manipulations. . In this work we present a novel design of reversible 2 DIGIT BCD ADDER using INTEGRATED QUBIT GATES. The reversible BCD adder is designed from 2*2 control V, Control V+, CNOT, MTSG,FREDKIN(4),FEYMAN, INTEGRATED QUBIT GATES (1).The design of proposed reversible adder- requires minimum quantum cost ,delay by maintaining ancilla inputs and garbage outputs.