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Conference on Information Sciences and Systems

FPGA Based Emulation Of B92 QKD Protocol

Umar Mujahid, Madiha Khalid, Muhammad Najam-ul-Islam

Published Mar 22, 2023• 2 citations
Publisher

Abstract

The global race to achieve quantum supremacy has made the design and development of quantum safe cryptography protocols inevitable. In the absence of commercial quantum computers, the classical computing based quantum system emulations are being used for the design and testing of quantum algorithms. In this paper, an FPGA based emulation of quantum system is tested for algorithm design by implementing the abstraction of B92 algorithm. The results of emulations are compared with the theoretical results of B92 algorithm for the performance bench-marking.

DOI
10.1109/ciss56502.2023.10089628

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The global race to achieve quantum supremacy has made the design and development of quantum safe cryptography protocols inevitable. In the absence of commercial quantum computers, the classical computing based quantum system emulations are being used for the design and testing of quantum algorithms. In this paper, an FPGA based emulation of quantum system is tested for algorithm design by implementing the abstraction of B92 algorithm. The results of emulations are compared with the theoretical results of B92 algorithm for the performance bench-marking.
Quantum computing leverages quantum mechanics to perform complex computations efficiently, yet its practical implementation is hindered by hardware-software interdependence and quantum state instability. This paper advances lightweight FPGA-based quantum emulation by incorporating a universal quantum gate set, including parameterized Phase gates and the CNOT gate, to support comprehensive quantum protocol emulation on FPGA hardware. The FPGA platform used for synthesis is Artix-7. The proposed emulator is validated through simulations of quantum circuits, including Bell States, the Deutsch algorithm, Superdense coding, Grover's search, and BB84 QKD, with results benchmarked against IBM's noiseless quantum simulator. Utilizing FPGA's customizable parallelism and energy efficiency, this framework offers a resource-efficient, reliable platform for developing and testing quantum algorithms.
Quantum computing leverages quantum mechanics to perform complex computations efficiently, yet its practical implementation is hindered by hardware-software interdependence and quantum state instability. This paper advances lightweight FPGA-based quantum emulation by incorporating a universal quantum gate set, including parameterized Phase gates and the CNOT gate, to support comprehensive quantum protocol emulation on FPGA hardware. The FPGA platform used for synthesis is Atrix 7. The proposed emulator is validated through simulations of quantum circuits, including Bell States, the Deutsch algorithm, Superdense coding, Grover’s search, and BB84 QKD, with results benchmarked against IBM’s noiseless quantum simulator. Utilizing FPGA’s customizable parallelism and energy efficiency, this framework offers a resource-efficient, reliable platform for developing and testing quantum algorithms.
Quantum computing leverages quantum mechanics to perform complex computations efficiently, yet its practical implementation is hindered by hardware-software interdependence and quantum state instability. This paper advances lightweight FPGA-based quantum emulation by incorporating a universal quantum gate set, including parameterized Phase gates and the CNOT gate, to support comprehensive quantum protocol emulation on FPGA hardware. The FPGA platform used for synthesis is Atrix 7. The proposed emulator is validated through simulations of quantum circuits, including Bell States, the Deutsch algorithm, Superdense coding, Grover’s search, and BB84 QKD, with results benchmarked against IBM’s noiseless quantum simulator. Utilizing FPGA’s customizable parallelism and energy efficiency, this framework offers a resource-efficient, reliable platform for developing and testing quantum algorithms.
Quantum computer emulators implemented on FPGA are generally designed to illustrate possible applications in which these concepts can be used - as a method of functional testing of possible applications involving quantum computing. In this paper we try to present another possible use of a quantum computation emulator, proposed by the authors, for the synthesis of circuits in FPGA with superior performance to conventional or parallel design methods. The paper presents a synthesis solution of parallel structures based on concepts from quantum computation emulated on FPGA. As will be seen in the paper, using the solution improves the computation time compared to the conventional method and reduces the number of resources allocated compared to the parallel solution. So, the solution which we propose is somewhere between conventional sequential logic circuit design methods - it has a shorter response time than these and parallel circuit design methods - it provides a smaller number of resources than these. In order to show the advantages of the proposed solution, we presented the implementation of a circuit for determining the parity of a binary function. The solution was implemented using the conventional solution, the parallel solution and the proposed solution using quantum computing concepts. It will show the performance of the proposed solution compared to the other design models.
The introduction of quantum computing has led to an immense increase in performance of various search and encryption algorithms. However the practical realization of quantum computers is1a challenging task. Hence quantum algorithms are being modeled on classical platforms. Hardware emulation of quantum computers has been found to be more effective than software simulations. In this paper, Grover's search algorithm has been modeled in the classical platform using both hardware emulation and software simulation approaches. The modified architecture of the field programmable gate arrays (FPGAs) and the unique data path implemented in this paper results in considerable speed-up and lesser utilization of resources as compared to other existing works. This work includes both simulation and emulation of Grover’s search for 2,3 and 5 qubit systems. The novel emulation approach has led to a 104times reduction in time of search than the corresponding simulation.
Abstract The number of transistors per unit area are increasing every year by virtue of Moore’s law. It is estimated that the current rate of evolution in the field of chip design will reduce the transistor to atomic scale by 2024. At atomic level the quantum mechanical characteristics dominate, affecting the ability of transistors to store information in the form of bits. The quantum computers have been proposed as one way to effectively deal with this predicament. The quantum computing circuits utilize the spinning characteristics of electron to store information. This paper describes a proposition of resource efficient FPGA based quantum circuit abstraction. A non-programmable embedded system capable of storing, introducing a phase shift in the qubit and its measurement is implemented. The main objective of the proposed abstraction is to provide a FPGA based platform comprising of fundamental sub blocks for designing quantum circuits. A primary quantum key distribution algorithm i.e BB84 is implemented on the proposed platform as a proof of concept. The distinguishing feature of the proposed design is the flexibility to enhance the quantum circuit emulation accuracy at the cost of computational resources. The proposed emulation exhibits two principal properties of the quantum computing i.e. parallelism and probabilistic measurement.