Abstract The number of transistors per unit area are increasing every year by virtue of Moore’s law. It is estimated that the current rate of evolution in the field of chip design will reduce the transistor to atomic scale by 2024. At atomic level the quantum mechanical characteristics dominate, affecting the ability of transistors to store information in the form of bits. The quantum computers have been proposed as one way to effectively deal with this predicament. The quantum computing circuits utilize the spinning characteristics of electron to store information. This paper describes a proposition of resource efficient FPGA based quantum circuit abstraction. A non-programmable embedded system capable of storing, introducing a phase shift in the qubit and its measurement is implemented. The main objective of the proposed abstraction is to provide a FPGA based platform comprising of fundamental sub blocks for designing quantum circuits. A primary quantum key distribution algorithm i.e BB84 is implemented on the proposed platform as a proof of concept. The distinguishing feature of the proposed design is the flexibility to enhance the quantum circuit emulation accuracy at the cost of computational resources. The proposed emulation exhibits two principal properties of the quantum computing i.e. parallelism and probabilistic measurement.
Abstract The number of transistors per unit area are increasing every year by virtue of Moore’s law. It is estimated that the current rate of evolution in the field of chip design will reduce the transistor to atomic scale by 2024. At atomic level the quantum mechanical characteristics dominate, affecting the ability of transistors to store information in the form of bits. The quantum computers have been proposed as one way to effectively deal with this predicament. The quantum computing circuits utilize the spinning characteristics of electron to store information. This paper describes a proposition of resource efficient FPGA based quantum circuit abstraction. A non-programmable embedded system capable of storing, introducing a phase shift in the qubit and its measurement is implemented. The main objective of the proposed abstraction is to provide a FPGA based platform comprising of fundamental sub blocks for designing quantum circuits. A primary quantum key distribution algorithm i.e BB84 is implemented on the proposed platform as a proof of concept. The distinguishing feature of the proposed design is the flexibility to enhance the quantum circuit emulation accuracy at the cost of computational resources. The proposed emulation exhibits two principal properties of the quantum computing i.e. parallelism and probabilistic measurement.
Hardware emulation based on field programmable gate array (FPGA) platform is vital to harness the power of quantum parallelism. As resource requirement grows exponentially in classical modeling quantum system, an optimum hardware architecture is crucial to emulate practical quantum circuits. Quantum Fourier transform (QFT) finds application in several critical quantum algorithms. In this work, experiments are conducted based on QFT to identify suitable qubit representation and hardware design technique. Experimental results show that 24-bit fixed point representation and serial architecture achieve optimal computation accuracy and resource utilization in QFT circuit emulation.
Hardware emulation of quantum systems can mimic more efficiently the parallel behaviour of quantum computations, thus allowing higher processing speed-up than software simulations. In this paper, an efficient hardware emulation method that employs a serial-parallel hardware architecture targeted for field programmable gate array (FPGA) is proposed. Quantum Fourier transform and Grover’s search are chosen as case studies in this work since they are the core of many useful quantum algorithms. Experimental work shows that, with the proposed emulation architecture, a linear reduction in resource utilization is attained against the pipeline implementations proposed in prior works. The proposed work contributes to the formulation of a proof-of-concept baseline FPGA emulation framework with optimization on datapath designs that can be extended to emulate practical large-scale quantum circuits.
Quantum computing leverages quantum mechanics to perform complex computations efficiently, yet its practical implementation is hindered by hardware-software interdependence and quantum state instability. This paper advances lightweight FPGA-based quantum emulation by incorporating a universal quantum gate set, including parameterized Phase gates and the CNOT gate, to support comprehensive quantum protocol emulation on FPGA hardware. The FPGA platform used for synthesis is Atrix 7. The proposed emulator is validated through simulations of quantum circuits, including Bell States, the Deutsch algorithm, Superdense coding, Grover’s search, and BB84 QKD, with results benchmarked against IBM’s noiseless quantum simulator. Utilizing FPGA’s customizable parallelism and energy efficiency, this framework offers a resource-efficient, reliable platform for developing and testing quantum algorithms.
As current trend of miniaturization in computing technology continues, modern computing devices would start to exhibit the behaviour of nanoscopic quantum objects. Quantum computing, which is based on the principles of quantum mechanics, becomes a promising candidate for future generation computing system. However, modelling quantum computing systems on existing classical computing platforms before the realization of viable large-scale quantum computer remains a major challenge. The exploration on the modelling of quantum computing systems on field programmable gate array (FPGA) platform, which offers the potential of massive parallelism and allows computational optimization at register-transfer level, is crucial. Due to the exponential growth of resource utilization with the increase in the number of quantum bits (qubit), existing works on modelling of quantum systems on FPGA platform are restricted to simple case studies using small qubit sizes. This work explores the modelling of quantum computing for emulation on FPGA platform based on two types of data structure: (a) state vector model and (b) Heisenberg model. For the conventional state vector modelling approach, an efficient datapath design that is based on serial-parallel hardware architecture, which allows resource sharing between unitary transformations, is proposed. Heisenberg model has been proven to be efficient in modelling stabilizer circuits, which are critical in error correction operations. In the effort to include the consideration of vital quantum error correction in practical quantum systems, a novel FPGA emulation framework that is based on the Heisenberg model is proposed. Effective algorithms for accurate global phase maintenance are proposed to facilitate the modelling of quantum systems based on the Heisenberg representation. The feasibility of the proposed state vector and Heisenberg emulation models are demonstrated based on a number of case studies with different characteristics, which include quantum Fourier transform, Grover’s search algorithm, and stabilizer circuits. Based on the state vector approach, this work has demonstrated the advantage of FPGA emulation over software simulation where hardware emulation of 7-qubit Grover’s search is about 3 × 104 times faster than the software simulation performed on Intel Core i7-4790 processor running at 3.6GHz clock rate. In contrast to the 8-qubit implementation based on the state vector model, the proposed FPGA emulation framework based on the Heisenberg model has successfully modelled 120-qubit stabilizer circuits on the Altera Stratix IV FPGA. In summary, the proposed work in this thesis contributes to the formulation of a proof-of-concept of efficient FPGA emulation framework based on the state vector and Heisenberg models.
Quantum computing leverages quantum mechanics to perform complex computations efficiently, yet its practical implementation is hindered by hardware-software interdependence and quantum state instability. This paper advances lightweight FPGA-based quantum emulation by incorporating a universal quantum gate set, including parameterized Phase gates and the CNOT gate, to support comprehensive quantum protocol emulation on FPGA hardware. The FPGA platform used for synthesis is Artix-7. The proposed emulator is validated through simulations of quantum circuits, including Bell States, the Deutsch algorithm, Superdense coding, Grover's search, and BB84 QKD, with results benchmarked against IBM's noiseless quantum simulator. Utilizing FPGA's customizable parallelism and energy efficiency, this framework offers a resource-efficient, reliable platform for developing and testing quantum algorithms.
Quantum computing leverages quantum mechanics to perform complex computations efficiently, yet its practical implementation is hindered by hardware-software interdependence and quantum state instability. This paper advances lightweight FPGA-based quantum emulation by incorporating a universal quantum gate set, including parameterized Phase gates and the CNOT gate, to support comprehensive quantum protocol emulation on FPGA hardware. The FPGA platform used for synthesis is Atrix 7. The proposed emulator is validated through simulations of quantum circuits, including Bell States, the Deutsch algorithm, Superdense coding, Grover’s search, and BB84 QKD, with results benchmarked against IBM’s noiseless quantum simulator. Utilizing FPGA’s customizable parallelism and energy efficiency, this framework offers a resource-efficient, reliable platform for developing and testing quantum algorithms.