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Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference

34.4 A Cryogenic Controller IC for Superconducting Qubits with DRAG Pulse Generation by Direct Synthesis without Using Memory

Kiseo Kang, Donggyu Minn, Jaeho Lee, Ho-Jin Song, Moonjoo Lee, Jae‐Yoon Sim

Published Feb 19, 2023• 27 citations
Publisher

Abstract

Recent achievements in the physical size of quantum computers based on superconducting qubits foresee reaching the next milestones of the exponentially growing number of qubits. The promises in the scalability present opportunities in integrated control electronics operating at 4K stage in the dilution refrigerator. In addition to the number of physical qubits, however, commercialization necessitates a further increase in the number of consecutive high-fidelity gate operations within a coherence time of$\sim 100\mu \mathsf{s}$. It leads to the stringent requirement on the duration of qubit-driving microwave pulse$(\mathsf{i.e}.,\ < 20\mathsf{ns})$. The microwave pulses should only drive$\vert 0\rangle\leftrightarrow\vert 1\rangle$for single qubit gate operations while avoiding leakage to$\vert 1\rangle\leftrightarrow\vert 2\rangle$which is the major factor that degrades the gate fidelity. The frequency for$\vert 1\rangle\leftrightarrow\vert 2\rangle, \omega_{12}$, is typically lower than the frequency for$\vert 0\rangle\leftrightarrow\vert 1\rangle, \omega_{01}$, by$2\pi\times(160\mathsf{MHz}-\mathsf{to}-360\mathsf{MHz})$. The frequency difference$(\omega_{01}-\omega_{12})$, called anharmonicity, is an individual qubit characteristic and becomes the margin for spectral management. But, a short driving pulse even with Gaussian, sine, or raised-cosine shapes eventually widens the spectral width. It would range a few hundred MHz and result in a considerable spectral leakage at$\omega_{12}$. To mitigate this spectral leakage, the derivative removal by adiabatic gate (DRAG) has been adopted in the pulse shaping [1], [2]. As shown in Fig. 34.4.1, the first-order DRAG pulse shaping is realized by adding two parts as \begin{equation*}\mathsf{O}(\mathrm{t})=\mathsf{S}_{\mathsf{M}}(\mathsf{t})\cdot\mathsf{cos}(\omega_{01}\mathsf{t}+\varphi)+\mathsf{q}_{\mathsf{scale}}\mathsf{S}_{\mathsf{M}}(\mathsf{t})^{\prime}\cdot\mathsf{sin}(\omega_{01}\mathsf{t}+\varphi)\end{equation*} where$\mathsf{S}_{\mathsf{M}}(\mathsf{t})$is the main pulse shape and$\mathsf{q}_{\mathsf{scale}}$is a coefficient inversely proportional to the anharmonicity. This first-order DRAG makes an asymmetrical spectrum that lowers the left frequency side and raises the right frequency side. Since the$\omega_{12}$is always on the left side of$\omega_{01}$, the DRAG can effectively minimize the leakage.

DOI
10.1109/isscc42615.2023.10067671

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High-fidelity control of superconducting qubits requires carefully shaped microwave pulses to avoid several different kinds of error at once. This article is a pedagogical bridging text aimed at upper-level undergraduate and early graduate students who have completed an introductory quantum mechanics course and a first course in quantum computing or quantum information, but who have not yet encountered the physical implementation of qubit gates. We integrate physical intuition for pulse design, analytical gate-level descriptions, and practical hardware considerations into a single, derivation-driven narrative, with explicit learning objectives. We begin with simple pulse envelopes and their spectral properties, showing how finite bandwidth produces leakage outside the computational subspace. This motivates the derivative removal by adiabatic gate (DRAG) technique, which we derive explicitly using the Magnus expansion, obtaining a clear, order-by-order account of which physical error channel appears at which order and why DRAG's cancellation is necessarily incomplete. We discuss the practical hardware realities of control pulse generation, focusing on arbitrary waveform generators (AWG), local oscillators (LO), and IQ mixing. Finally, we extend the discussion to two-qubit operation via the cross-resonance gate, and interpret how driving the control qubit at the target qubit's transition frequency necessarily produces several unwanted interaction terms alongside the desired one, and how successive generations of pulse-engineering strategies have been designed to suppress them.
This article presents a cryo-CMOS controller that supports derivative removal by adiabatic gate (DRAG) pulses without requiring internal memory. The proposed scheme uses trigonometric relations that substitute a product of two sinusoids by a sum of two frequencies at the same frequencies. It enables embedding the DRAG pulse shaping in an architecture of memory-free real-time direct digital synthesis (DDSs). This work also investigates the effect of inter-channel interference (ICI) and introduces a technique to suppress it by flowing compensating current to the on-chip ground. The implemented chip in 40-nm bulk CMOS supports the DRAG pulses for sine and raised-cosine shaping and suppresses the ICI by 10 dB, showing an SFDR of >40 dBc in the presence of ICI. The total power consumption when generating a rectangular pulse without DRAG is 4.2 mW, and it increases to 6.5 mW when generating sine-shaped pulse with DRAG.
In the traditional approach to controlling superconducting qubits using microwave pulses, the field of pulse shaping has emerged in order to assist in the removal of leakage and increase gate fidelity. However, the challenge of scaling microwave control electronics has created an opportunity to explore alternative methods such as single-flux quantum (SFQ) pulses. For qubits controlled by SFQ pulses, high fidelity gates can be achieved by optimizing the binary control sequence. We extend the notion of the derivative removal by adiabatic gate (DRAG) framework a transmon qubit controlled by SFQ drivers. The proposed implementation of SFQ pulse sequences can be stored in 22 bits or fewer, with gate fidelities exceeding 99.99%. This modest memory requirement could help reduce the footprint of the SFQ coprocessors and power dissipation while preserving their inherent advantages of scalability and cost-effectiveness.
Extensive research on quantum mechanics in past decades has successfully paved the way towards the disruptive technology of quantum computing. A further step to the realization of a fault-tolerant scalable quantum computer is presenting challenges in the field of engineering. It necessitates a microsystem operating at 4K in a dilution refrigerator, which would be inevitable to control thousands or millions of qubits sitting at 10mK. There have been IC implementations of pulse modulators generating qubit-controlling microwave signals [1– 4]. The pulse modulation based on direct synthesis demonstrated feasibility of driving multiple qubits with frequency-division multiplexing (FDM) through one RF cable [1 – 3]. The first implementation of a full controller [1], which includes both read and write chains for spin qubits, demonstrated the highest level of integration. However, the previous work used external local oscillator (LO) sources for frequency synthesis. External feeding of LO requires precise matching; otherwise, a failure would cause leakage to the qubit driving output through PCB traces, resulting in AC-Stark shift of qubit state by unwanted tones at near-resonance. It becomes more problematic in FDM-based multi-qubit driving. Since the fidelity of qubit operations strongly relies on the quality of driving frequency, a low-noise LO generation by a phase-locked loop (PLL) is one of the most important factors [5]. The internal generation of LO gives additional benefits in superconducting qubit interface. It necessitates multiple LOs since the superconducting qubit uses microwave pulse driving for both read and write. To detect the state of a qubit through dispersive readout, the phase reflected from the readout resonator should be measured. Therefore, the driving pulses for the read and the write should be synchronized to a single reference timing. Using built-in PLLs sharing a single reference clock naturally solves this problem.
Improving the speed and fidelity of quantum logic gates is essential to reach quantum advantage with future quantum computers. However, fast logic gates lead to increased leakage errors in superconducting quantum processors based on qubits with low anharmonicity, such as transmons. To reduce leakage errors, we propose and experimentally demonstrate two new analytical methods, Fourier ansatz spectrum tuning derivative removal by adiabatic gate (FAST DRAG) and higher-derivative (HD) DRAG, both of which enable shaping single-qubit control pulses in the frequency domain to achieve stronger suppression of leakage transitions compared to previously demonstrated pulse shapes. Using the new methods to suppress the e f transition of a transmon qubit with an anharmonicity of − 212 MHz, we implement R X ( π / 2 ) gates achieving a leakage error below 3.0 × 10 − 5 down to a gate duration of 6.25 ns without the need for iterative closed-loop optimization. The obtained leakage error represents a 20-fold reduction in leakage compared to a conventional cosine DRAG pulse. Employing the FAST DRAG method, we further achieve an error per gate of ( 1.56 ± 0.07 ) × 10 − 4 at a 7.9-ns gate duration, outperforming conventional pulse shapes both in terms of error and gate speed. Furthermore, we study error-amplifying measurements for the characterization of temporal microwave control-pulse distortions, and demonstrate that non-Markovian coherent errors caused by such distortions may be a significant source of error for sub-10-ns single-qubit gates unless corrected using predistortion. Published by the American Physical Society 2024
Quantum computing promises exponential speed-up in solving certain complex problems that would be intractable by classical computers. However, thousands or millions of qubits might be required to solve useful problems. High-precision and low-noise electrical signals are required to manipulate and read the state of a qubit and to control qubit-to-qubit interactions. Current systems use room temperature electronics with many coax cables routed to the qubit chip inside a dilution refrigerator. This approach does not scale to large number of qubits, due to form factor, cost, power consumption and thermal load to the fridge. To address this challenge, a cryogenic qubit controller has been proposed [1]. The first integrated implementation of a cryogenic pulse modulator has been presented in [2], demonstrating the capability of manipulating (drive) the state of superconducting qubits. The work in [3] extends the capability of the controller with 3 main features: frequency-multiplexing to reduce the number of RF cables per qubit, an arbitrary I/Q pulse generation for improved control fidelity and a digitally-intensive architecture with integrated instruction set to enable integration in existing quantum control stacks. This work further advances the prior art by integrating the capability of reading the qubit state and generating the voltage pulses required for drive, readout, 2-qubit operations and qubit characterization. The SoC can drive up to 16 spin qubits by frequency multiplexing over a single RF line, read the state of up to 6 qubits simultaneously and control up to 22 gate potentials. The SoC also integrates a μ\muμ-controller for increased flexibility in implementing the control instruction set. The proposed cryogenic controller can replace all the high-speed control electronics used in conventional solutions today, paving the way towards scalable quantum computers.