Abstract Any quantum program on a realistic quantum device must be compiled into an executable form while taking into account the underlying hardware constraints. Stringent restrictions on architecture and control imposed by physical platforms make this very challenging. In this paper, based on the quantum variational algorithm, we propose a novel scheme to train an Ansatz circuit and realize high-fidelity compilation of a set of universal quantum gates for singlet-triplet qubits in semiconductor double quantum dots, a fairly heavily constrained system. Furthermore, we propose a scalable architecture for a modular implementation ofquantum programs in this constrained systems and validate its performance with two representative demonstrations, Grover's algorithm for the database searching (static compilation) and a variant of variational quantum eigensolver for the Max-Cut optimization (dynamic compilation). Our methods are potentially applicable to a wide range of physical devices. This work constitutes an important stepping-stone for exploiting the potential for advanced and complicated quantum algorithms on near-term devices.
Abstract Any quantum program on a realistic quantum device must be compiled into an executable form while taking into account the underlying hardware constraints. Stringent restrictions on architecture and control imposed by physical platforms make this very challenging. In this paper, based on the quantum variational algorithm, we propose a novel scheme to train an Ansatz circuit and realize high-fidelity compilation of a set of universal quantum gates for singlet-triplet qubits in semiconductor double quantum dots, a fairly heavily constrained system. Furthermore, we propose a scalable architecture for a modular implementation ofquantum programs in this constrained systems and validate its performance with two representative demonstrations, Grover's algorithm for the database searching (static compilation) and a variant of variational quantum eigensolver for the Max-Cut optimization (dynamic compilation). Our methods are potentially applicable to a wide range of physical devices. This work constitutes an important stepping-stone for exploiting the potential for advanced and complicated quantum algorithms on near-term devices.
Abstract Any quantum program on a realistic quantum device must be compiled into an executable form while taking into account the underlying hardware constraints. Stringent restrictions on architecture and control imposed by physical platforms make this very challenging. In this paper, based on the quantum variational algorithm, we propose a novel scheme to train an Ansatz circuit and realize high-fidelity compilation of a set of universal quantum gates for singlet-triplet qubits in semiconductor double quantum dots, a fairly heavily constrained system. Furthermore, we propose a scalable architecture for a modular implementation of quantum programs in this constrained systems and validate its performance with two representative demonstrations, the Grover’s algorithm for the database searching (static compilation) and a variant of variational quantum eigensolver for the Max-Cut optimization (dynamic compilation). Our methods are potentially applicable to a wide range of physical devices. This work constitutes an important stepping-stone for exploiting the potential for advanced and complicated quantum algorithms on near-term devices.
Abstract Implementing quantum algorithms on realistic devices requires translating high-level global operations into sequences of hardware-native logic gates, a process known as quantum compiling. Physical limitations, such as constraints in connectivity and gate alphabets, often result in unacceptable implementation costs. To enable successful near-term applications, it is crucial to optimize compilation by exploiting the capabilities of existing hardware. Here we implement a resource-efficient construction for a quantum version of AND logic that can reduce the compilation overhead, enabling the execution of key quantum circuits. On a high-scalability superconducting quantum processor, we demonstrate low-depth synthesis of high-fidelity generalized Toffoli gates with up to 8 qubits and Grover’s search algorithm in a search space of up to 64 entries. Our experimental demonstration illustrates a scalable and widely applicable approach to implementing quantum algorithms, bringing more meaningful quantum applications on noisy devices within reach.
Semiconductor quantum dots provide a promising platform for spin qubit manipulation and quantum logic gate implementation, which are essential for scalable quantum computing architectures. In this work we utilize a variational quantum compiling algorithm to design efficient three-qubit gates using a time-independent Hamiltonian composed of only physical interaction terms. The resulting gates, including the Toffoli and Fredkin gates, demonstrate high fidelity and robustness against both coherent and incoherent noise sources, including charge and nuclear spin noise. This method is applicable to a wide range of physical systems, such as superconducting qubits and trapped ions, paving the way for more resilient and universal quantum computing architectures.
A quantum compiler is required to run a quantum circuit on a quantum computer, similar to how classical compilers are required to run programs on classical computers. Spin qubits are a promising candidate for scalable quantum computers. General-purpose quantum compilers can be used for spin qubit devices, however they do not consider additional constraints imposed due to Double-Quantum-Dot (DQD) readout. For DQD readout, when a qubit in an algorithm is measured, the compiler must remap and re-route it to be adjacent to a special-purpose readout qubit, which is preserved in a known state. Moreover, this should be done in a way that minimizes overhead and maximizes the fidelity, in particular, due to noise in the readout process. This work formulates readout constraints to extend SMT (Satisfiability Modulo Theory)-based layout synthesis techniques proposed in [1] to spin qubit architectures. We define a metric, readout depth, to quantify the overheads incurred. Preliminary results, obtained from benchmarking GHZ and variational quantum eigensolver circuits on architectures with grid topologies, highlight the algorithmic tradeoffs that arise. We expect ongoing work on scaling up the methods to a larger set of algorithms will help inform the decisions of spin qubit hardware designers.
Quantum circuit compilation is a critical step in realizing quantum algorithms on real quantum hardware. Traditional compilation methods often employ static optimization strategies, neglecting the unique constraints and characteristics of the target quantum device. This paper introduces a novel adaptive quantum circuit compilation framework designed to dynamically adjust circuit designs based on hardware-specific information, aiming to minimize gate count and, consequently, error rates. The core of the framework lies in integrating a hardware simulator directly within the compilation process. This allows the compiler to evaluate the performance of various circuit designs—considering factors like qubit connectivity, gate fidelity, and decoherence models—before committing to a final layout. The proposed approach represents a shift from static to adaptive optimization, providing a more nuanced and effective strategy for translating quantum algorithms into executable code on diverse quantum hardware platforms. This research demonstrates a significant potential improvement in quantum circuit efficiency and fidelity, addressing a key bottleneck in the advancement of quantum computing.
This paper presents a novel approach to quantum circuit compilation that leverages the feedback capabilities of the Variational Quantum Eigensolver (VQE) to achieve adaptive optimization. Traditional quantum compilation methods are static, assuming a known and consistent noise profile for the target quantum hardware. However, real quantum devices exhibit significant noise variations, leading to suboptimal circuit execution. Our strategy addresses this challenge by dynamically adjusting compilation parameters based on the VQE's error estimations during runtime. The core idea is to implement a real-time optimization loop where the VQE provides error estimates for individual gate operations, and the compiler subsequently modifies the circuit topology and gate choices to minimize overall error. This adaptive compilation scheme allows the quantum circuit to 'learn' the noise characteristics of the hardware, leading to a reduction in gate count and improved fidelity. The presented framework offers a pathway towards more robust and efficient quantum computation, particularly relevant as quantum hardware matures and noise mitigation techniques become more sophisticated. We outline the key components of the system, including the VQE integration, the compilation algorithm, and a discussion of potential challenges and future research directions.