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Superconducting qubit devices based on metal silicides

Charles T. Black

Published Jan 23, 2023• 0 citations
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Abstract

A qubit device for use in a quantum computing environment includes a semiconductor substrate, an insulating layer disposed on at least a portion of an upper surface of the substrate, and a transition metal silicide (TMSi) heterojunction disposed on at least a portion of an upper surface of the insulating layer. The TMSi heterojunction includes a link layer and at least first and second TMSi regions coupled with the link layer. The link layer may include a normal conductor, thereby forming a superconductor-normal conductor-superconductor (SNS) junction, or a geometric constriction, thereby forming a superconductor-geometric constriction-superconductor (ScS) junction. The link layer may form at least a portion of a channel including intrinsic or doped silicon.

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A qubit device for use in a quantum computing environment includes a semiconductor substrate, an insulating layer disposed on at least a portion of an upper surface of the substrate, and a transition metal silicide (TMSi) heterojunction disposed on at least a portion of an upper surface of the insulating layer. The TMSi heterojunction includes a link layer and at least first and second TMSi regions coupled with the link layer. The link layer may include a normal conductor, thereby forming a superconductor-normal conductor-superconductor (SNS) junction, or a geometric constriction, thereby forming a superconductor-geometric constriction-superconductor (ScS) junction. The link layer may form at least a portion of a channel including intrinsic or doped silicon.
A quantum computing device that includes a plurality of semiconductor adiabatic qubits is described herein. The qubits are programmed with local biases and coupling terms between qubits that represent a problem of interest. The qubits are initialized by way of a tuneable parameter, a local tunnel coupling within each qubit, such that the qubits remain in a ground energy state, and that initial state is represented by the qubits being in a superposition of |0> and |1> states. The parameter is altered over time adiabatically or such that relaxation mechanisms maintain a large fraction of ground state occupation through decreasing the tunnel coupling barrier within each qubit with the appropriate schedule. The final state when tunnel coupling is effectively zero represents the solution state to the problem represented in the |0> and |1> basis, which can be accurately read at each qubit location.
We demonstrate a direct writing method for the fabrication of planar Josephson junctions from high-quality superconducting niobium titanium nitride (NbTiN) thin films, by creating local disorder using focused He ion beam irradiation. We control the suppression of superconductivity in NbTiN as a function of the helium ion beam fluence, enabling us to successfully fabricate Josephson junctions with highly tunable weak links ranging from the metallic to the insulating phase, utilizing the continuous nature of the disorder-induced superconductor-insulator transition. We demonstrate the successful fabrication of both superconductor-normal metal-superconductor (SNS) and superconductor-insulator-superconductor (SIS) type of devices, and show that we can achieve an exceptionally wide range ( ∼ 5 orders of magnitude) of critical current densities and junction resistances. The SNS-type junctions follow closely the ideal resistively and capacitively shunted junction behavior, have high characteristic voltages up to ∼ 1.5 mV , and show Shapiro steps up to very high orders, while the SIS junctions also follow established theories well. The results suggest that the junctions are suitable for a wide range of applications in superconducting electronics because of the excellent mechanical, electrical, and microwave properties of NbTiN. In particular, as NbTiN has previously been used to fabricate high-quality factor microwave resonators, we see the method as a promising and simple way to realize high-frequency superconducting qubits and other quantum devices using only a single superconducting film.
In this paper we demonstrate the reduction of heating in a niobium superconductor-insulator-superconductor (SIS) junction with aluminum-oxide tunnel barrier embedded in a niobium-titanium-nitride circuit. Nonequilibrium quasiparticles which are created due to the Andreev trap at the interface between the niobium and the niobium-titanium-nitride layers are relaxed by inserting a normal-metal conductor of gold between these two layers. In an earlier work we explained the observed relaxation of nonequilibrium quasiparticles due to the geometrically assisted cooling effect. In this paper we investigate this cooling effect in dependence of the normal-metal layer shape and size. We expect that an adapted normal-metal layer is necessary for implementation in practical terahertz SIS heterodyne mixer circuits. We observe in DC-measurements of a large number of devices a clear relation between the volume of the gold layer and the effective electron temperature in the device. Our central finding is that the shape of the gold layer does not influence the cooling provided that the volume is sufficient.
Circuits supraconducteurs en technologie silicium L’évolution de la fabrication et l’exploitation des ordinateurs quantiques est essentielle pour dépasser l’ère NISQ. Jusqu’à présent, les qubits transmon supraconducteurs basés sur des jonctions tunnel Josephson en aluminium ont donné les résultats les plus avancés, bien que cette technologie soit difficile à mettre en oeuvre dans des installations à grande échelle.Un autre qubit "gatemon" est apparu récemment, qui utilise des dispositifs hybrides supraconducteurs/semiconducteurs (S/Sm) comme jonctions Josephson accordées par un contrôle électrostatique. Cependant, les implémentations actuelles de ces dispositifs utilisent des nanofils, dont la fabrication à grande échelle n’a pas encore atteint sa maturité. Une conception évolutive de gatemon pourrait être réalisée avec des transistors à effet de champ Josephson CMOS comme lien faible accordable, où un dispositif idéal est constitué de réservoirs supraconducteurs qui contactent un canal court par des interfaces à haute transparence. Une transparence élevée, ou une faible résistance de contact,est obtenue dans l’industrie de la microélectronique avec des siliciures, dont certains s’avèrent être supraconducteurs. La première partie du travail expérimental de cette thèse couvre les études de matériaux sur deux de ces matériaux : V3Si et PtSi, qui sont intéressants pour leur Tc élevé, et leur intégration mature. La deuxième partie couvre des résultats expérimentaux sur des transistors PtSi de longueur de grille 50nm, où la transparence des interfaces S/Sm est modulée par la tension de grille. A basse tension,le transport ne montre aucune conductance à basse énergie, et des pics de cohérence bien définis au niveau du gap supraconducteur. La hauteur de la barrière à l’interfaceS/Sm est réduite en augmentant la tension de grille, jusqu’à ce qu’un pic de conductance apparaisse autour d’une tension de drain nulle, ce qui révèle l’apparition d’un courant d’Andreev. La modulation du courant d’Andreev par une grille dans un transistor à base de silicium, représente une étape vers des ordinateurs quantiques supraconducteurs entièrement intégrés en CMOS.
Superconductor-normal-superconductor (SNS) weak links using a semiconductor as the normal region are of interest for applications in high frequency Josephson devices and in superconducting field effect transistors. Recently, there has been a revival of interest in materials such as InAs which, in principle, allow true SNS structures without tunneling (Schottky) barriers at the electrodes, In this paper we discuss the requirements for semiconductor SNS Josephson and FET devices and describe the fabrication and characterization of planar SNS weak links in which the normal region is InAs, which is part of a heterostructure consisting of a thin (100 nm) layer of n-InAs grown on undoped GaAs. Nb electrodes defined by electron beam lithography have been made with spacings as small as 260 nm. Preliminary measurements indicate that the devices have good electrical behavior which is well explained by SNS weak link theory, using coherence lengths calculated from measured material parameters. These weak links can be the basis for superconducting FET devices, and have the significant advantage of allowing simple device isolation compared with bulk InAs, which was used in earlier work.