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Journal of Lightwave Technology

Large-Scale and High-Speed FPGA-Based Privacy Amplification for Quantum Key Distribution

Bingze Yan, Qiong Li, Haokun Mao, Hongwei Xu, Ahmed A. Abd El‐Latif

Published Oct 14, 2022• 10 citations
Publisher

Abstract

In this paper, a high-performance field-programmable gate array (FPGA) based privacy amplification (PA) scheme for both continuous variable and discrete variable - quantum key distribution (QKD) is presented, which can provide more than 1.5 Gbps throughput at the input block size close to$10^{8}$. Besides, the resource consumption is so economical that there is no need of any external storage. To the best of our knowledge, our scheme outperforms existing FPGA based PA schemes by over an order of magnitude in terms of throughput and input block size. To achieve this feature, we design a novel FPGA-based hybrid hash PA algorithm combining multilinear modular hash and modular arithmetic hash (MMH-MH) based on number theoretical transform (NTT). Based on the hybrid hash algorithm, many optimization strategies are designed in our FPGA based PA scheme, such as an NTT-based optimization unit, an NTT-reusable architecture, a memory-saving modular accumulation unit for multilinear modular hash and a pipelined binary modulo unit for modular arithmetic hash. Plentiful experiment results demonstrate the high performance and reliability of our scheme. It can be embedded in most standalone QKD devices conveniently. What's more, it is also a good candidate for a chip-based QKD system.

DOI
10.1109/jlt.2022.3214440

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In this paper, a high-performance field-programmable gate array (FPGA) based privacy amplification (PA) scheme for both continuous variable and discrete variable - quantum key distribution (QKD) is presented, which can provide more than 1.5 Gbps throughput at the input block size close to10810^{8}108. Besides, the resource consumption is so economical that there is no need of any external storage. To the best of our knowledge, our scheme outperforms existing FPGA based PA schemes by over an order of magnitude in terms of throughput and input block size. To achieve this feature, we design a novel FPGA-based hybrid hash PA algorithm combining multilinear modular hash and modular arithmetic hash (MMH-MH) based on number theoretical transform (NTT). Based on the hybrid hash algorithm, many optimization strategies are designed in our FPGA based PA scheme, such as an NTT-based optimization unit, an NTT-reusable architecture, a memory-saving modular accumulation unit for multilinear modular hash and a pipelined binary modulo unit for modular arithmetic hash. Plentiful experiment results demonstrate the high performance and reliability of our scheme. It can be embedded in most standalone QKD devices conveniently. What's more, it is also a good candidate for a chip-based QKD system.
The FPGA-based Quantum key distribution (QKD) system is an important trend of QKD systems. It has several advantages, real time, low power consumption and high integration density. Privacy amplification is an essential part in a QKD system to ensure the security of QKD. Existing FPGA-based privacy amplification schemes have an disadvantage, that the throughput and the input size of these schemes (the best scheme 116Mbps@10^6) are much lower than these on other platforms (the best scheme 1Gbps@10^8). This paper designs a new PA scheme for FPGA-based QKD with multilinear modular hash-modular arithmetic hash (MMH-MH) PA and number theoretical transform (NTT) algorithm. The new PA scheme, named large-scale and high-speed (LSHS) PA scheme, designs a multiplication-reusable architecture and three key units to improve the performance. This scheme improves the input size and throughput of PA by above an order of magnitude. The throughput and input size of this scheme (1Gbps@10^8) is at a comparable level with these on other platforms.
Privacy amplification (PA) is an essential part in a quantum key distribution (QKD) system, distilling a highly secure key from a partially secure string by public negotiation between two parties. The optimization objectives of privacy amplification for QKD are large block size, high throughput and low cost. For the global optimization of these objectives, a novel privacy amplification algorithm is proposed in this paper by combining multilinear-modular-hashing and modular arithmetic hashing. This paper proves the security of this hybrid hashing PA algorithm within the framework of both information theory and composition security theory. A scheme based on this algorithm is implemented and evaluated on a CPU platform. The results on a typical CV-QKD system indicate that the throughput of this scheme (261Mbps@2.6*10^8 input block size) is twice higher than the best existing scheme (140Mbps@1*10^8 input block size). Moreover, This scheme is implemented on a mobile CPU platform instead of a desktop CPU or a server CPU, which means that this algorithm has a better performance with a much lower cost and power consumption.
Large-Scale FPGA-Based Privacy Amplification Exceeding 10810^8108 Bits for Quantum Key Distribution
Privacy Amplification (PA) is indispensable in Quantum Key Distribution (QKD) post-processing, as it eliminates information leakage to eavesdroppers. Field-programmable gate arrays (FPGAs) are highly attractive for QKD systems due to their flexibility and high integration. However, due to limited resources, input and output sizes remain the primary bottleneck in FPGA-based PA schemes for Discrete Variable (DV)-QKD systems. In this paper, we present a large-scale FPGA-based PA scheme that supports both input block sizes and output key sizes exceeding 10810^8108 bits, effectively addressing the challenges posed by the finite-size effect. To accommodate the large input and output sizes, we propose a novel PA algorithm and prove its security. We implement and evaluate this scheme on a Xilinx XCKU095 FPGA platform. Experimental results demonstrate that our PA implementation can handle an input block size of 10810^8108 bits with flexible output sizes up to the input size. For DV-QKD systems, our PA scheme supports an input block size nearly two orders of magnitude larger than current FPGA-based PA schemes, significantly mitigating the impact of the finite-size effect on the final secure key rate.
ABSTRACT Privacy amplification (PA) is a crucial step in Quantum Key Distribution (QKD). The original key with the risk of information leakage is transformed into the final key with information theory security through PA. The speed of PA limits the overall rate of QKD. This article proposes a novel approach of PA. This method connects Square Hash (SQH) and number‐theory transform Hash (NH) in series and utilizes number‐theoretic fast Fourier transform (NTT) to reduce its computational complexity to . This paper provides a security proof based on information theory. To implement the scheme based on field programmable gate arrays (FPGA), this paper designed a new architecture to support it. Several optimization techniques of the PA scheme have been implemented to accelerate computation speed and reduce resource consumption, including parallel NTT computation unit and pipelined carry unit, etc. This architecture is also applicable to other similar PA scheme. The experiment result achieves a higher throughput than the compared FPGA‐based works. After further optimization of the architecture, the clock frequency reaches 250 MHz, and the throughput exceeds 10 Gbps, achieving more than 6 times higher than the fastest PA solution among the compared works.
Privacy amplification (PA) is a critical process in quantum key distribution (QKD) systems, essential for eliminating information leakage to eavesdroppers and extracting unconditionally secure keys. In practical high-speed QKD systems, a large input size enables the PA scheme to approach the asymptotic limit of the secure-key rate. Concurrently, the throughput of the PA scheme must keep pace with the GHz-level clock rates of modern QKD systems to prevent it from becoming a systemic bottleneck. To globally optimize these objectives, this paper proposes a scalable and highly efficient PA scheme combining a novel δ-almost-universal hash family (FM3H) with modular arithmetic hashing (MH), and proves the security of this hybrid scheme, within the information-theoretic and quantum-side framework. The proposed scheme achieves a throughput of 283 Mbps on a common mobile CPU with an input size of 1010 bits. NIST statistical tests and avalanche-effect measurements are reported as characterizations of the statistical properties of the output sequences. To our knowledge, this work presents the first FPGA-based implementation of a modular hashing-based PA scheme, thereby breaking the dependence of modular hashing schemes on general software platforms. In DV-QKD systems, the FPGA-based scheme achieves a throughput of 1.706 Gbps while maintaining low resource overhead.
Privacy amplification (PA) is a vital procedure in quantum key distribution (QKD) to generate the secret key that the eavesdropper has only negligible information from the identical correcting key for the communicating parties. With the increase of repeat frequency of discrete-variable QKD (DV-QKD) system, the processing speed of PA has become the bottle neck restricting DV-QKD's secure key rate. The PA using Toeplitz-based Hash function is adopted widely because of its simplicity and parallel feature. Because this algorithm can be accelerated with Fast Fourier Transform (FFT), an improved scheme PA for Field-programmable Gate Array (FPGA) based on this is proposed. This paper improves the custom FFT-based algorithm by reducing the number of computations and read/write memory operations significantly. The correctness is verified when implemented in a Xilinx Virtex-6 FPGA. Meanwhile, the processing speed of improved scheme can nearly double the classical Toeplitz Hashing scheme on FPGA through the actual experiment.