Isoelectronic defects, specifically Sn with a spin-\textonehalf{} nucleus, are proposed as the quantum bits in a quantum processor, with internuclear operations mediated by smoothly shuttling electrons from one qubit to another.
Spin-21119Sn nuclei in a silicon semiconductor could make excellent qubits. Nuclear spins in silicon are known to have long coherence times. Tin is isoelectronic with silicon, so we expect electrons can easily shuttle from one Sn atom to another to propagate quantum information via a hyperfine interaction that we predict, from all-electron linearized augmented plane wave density functional theory calculations, to be roughly ten times larger than intrinsic 29Si. A hyperfine-induced electro-nuclear controlled-phase (e-n-CPhase) gate operation, generated (up to local rotations) by merely holding an electron at a sweet-spot of maximum hyperfine strength for a specific duration of time, is predicted to be exceptionally resilient to charge/voltage noise. Diabatic spin flips are suppressed with a modest magnetic field (>15mT for <10−6 flip probabilities) and nuclear spin bath noise may be avoided via isotopic enrichment or mitigated using dynamical decoupling or through monitoring and compensation. Combined with magnetic resonance control, this operation enables universal quantum computation.
Spin shuttling has crystalized as a powerful and promising tool for establishing intermediate-range connectivity in semiconductor spin-qubit devices. Although experimental demonstrations have performed exceptionally well on different materials platforms, the question of how to handle areas of low valley splitting in silicon during shuttling remains unresolved. In this work, we explore the possibility of utilizing the valley degree of freedom, particularly in regions of low valley splitting, to allow mobile spin qubits to be shuttled through an occupied stationary quantum dot, thereby leapfrogging over the stationary electron. This not only grants a more enriched mobility for shuttled electrons, as it opens new possible routing paths, but also enables the implementation of an entangling SWAPγ two-qubit gate operation in the process. Simulating this process for different sets of parameters, we demonstrate the feasibility of such an operation and offer a unique use case for otherwise precarious regions of a quantum processor chip and propose a possible extension to the set of possible operations for silicon spin qubit devices.
Coherent electron shuttling is a key requirement for realizing scalable silicon quantum computing architectures. However, in silicon qubits, the existence of nearly degenerate conduction-band valleys poses a significant challenge because non-adiabatic transitions to excited valley states cause spin dephasing via spin-valley mixing. In this paper, we propose a smooth velocity shuttling protocol to suppress these valley excitations. By mapping the time-domain design of the shuttling velocity profile onto the design problem of window functions in signal processing, we establish an analytical and intuitive design guideline that does not require computationally expensive numerical optimization. We demonstrate that the high-frequency sidelobes of the shuttling velocity spectrum can be effectively suppressed by applying a frequency-modulated gate voltage based on the Tukey window. Through statistical numerical simulations incorporating realistic spatial randomness of the valley landscape, we show that the proposed smooth velocity control significantly reduces the average spin infidelity in the moderate-to-low disorder regime (∣Δ0∣/σΔ≃O(1)). Our results underscore that this simple, control-level velocity shaping provides a robust pathway toward high-fidelity spin transport in large-scale silicon quantum processors.