Quantumtechnologies, especially quantum computers, show great promise for revolutionizing high-performance computing and simulation.As prototype quantum computers come online, it is becoming clear that obtaining useful output from such devices will require layers of sophisticated classical software that provide interpretation and analysis of the quantum computer's state and output.We will develop critical components in this "software stack" with a particular focus on enabling near-term Noisy Intermediate-Scale Quantum (NISQ) technologies.We have identified three critical needs for near-term quantum computing platforms, and the project is structured around three thrusts that address these needs.Application layer e.g., Abstract algorithms and interfaces with classical software.Thrust 3 Logical layer e.g., Compilation software that translates algorithms to quantum circuits.Thrust 1 Hardware layer e.g., Quantum circuit programs and hardware-level error mitigation.Thrust 2 Verification of correctness of circuit compilations New robust circuit compilations Verification of' correctness of new VHP heuristics Symmetries, influential circuit parameters New VHP heuristicsHow the project thrusts fit into the conventional picture of a quantum computing software stack, and how the outcomes of each thrust inform the other ones. Research HighlightsProveIt theorem proving assistant pv
Quantumtechnologies, especially quantum computers, show great promise for revolutionizing high-performance computing and simulation.As prototype quantum computers come online, it is becoming clear that obtaining useful output from such devices will require layers of sophisticated classical software that provide interpretation and analysis of the quantum computer's state and output.We will develop critical components in this "software stack" with a particular focus on enabling near-term Noisy Intermediate-Scale Quantum (NISQ) technologies.We have identified three critical needs for near-term quantum computing platforms, and the project is structured around three thrusts that address these needs.Application layer e.g., Abstract algorithms and interfaces with classical software.Thrust 3 Logical layer e.g., Compilation software that translates algorithms to quantum circuits.Thrust 1 Hardware layer e.g., Quantum circuit programs and hardware-level error mitigation.Thrust 2 Verification of correctness of circuit compilations New robust circuit compilations Verification of' correctness of new VHP heuristics Symmetries, influential circuit parameters New VHP heuristicsHow the project thrusts fit into the conventional picture of a quantum computing software stack, and how the outcomes of each thrust inform the other ones. Research HighlightsProveIt theorem proving assistant pv
Quantum computing has recently transitioned from a theoretical prediction to a nascent technology. Nevertheless, there is still a gap between the computational ability and reliability of current QIP technologies and the requirements of the first useful quantum computing applications. It will require tremendous efforts and investment to solve the engineering and research challenges to close the gap. Because of the uncertainties and difficulties in relying on hardware breakthroughs, it will also be crucial to close the gap using higher-level quantum optimizations and software-hardware co-design, which could maximally utilize noisy devices and potentially provide an accelerated pathway to real-world quantum computing applications. This thesis develops methods to explore the vast design space for highly optimized and reliable quantum computing architectures and software and focuses on the compilation, verification, and error correction aspects of the quantum computing stack. Specifically, the three main chapters in this thesis discuss, respectively, a direct-to-pulse compiler, a protocol to fault-tolerantly prepare approximate GKP (Gottesman-Kitave-Preskill) qubit states, and a verification framework that helps quantum programmers write provably correct compiler components through formal verification. Though touching many aspects of the stack and based on different technologies in physics and computer science, the majority of this thesis can be connected by a main theme --- improving the efficiency of existing quantum computing stacks by breaking the abstraction between layers in the quantum computing stack.
The advances in quantum hardware with functional quantum processors integrating tens of noisy qubits, together with the availability of near-term quantum algorithms have allowed the development of the so-called full-stacks that bridge quantum applications with quantum devices. In this talk, we will provide an overview of the different layers of the quantum computing full-stack, with emphasis on the software ones that include the compilation of quantum algorithms. We will then discuss the need for optimal physical-aware and algorithm-driven compilation techniques in the midst of the NISQ (Noisy Intermediate-scale quantum) era. We will also focus on key principles for architecting quantum computers such as codesign, optimization and benchmarking and illustrate how the use of structured design space exploration methodologies could help towards the development of a cross-layer codesign framework for full-stack quantum computing systems. Finally, we will talk about the scalability of quantum computing systems, which is one of the main challenges the quantum computing community is currently facing.
The progress in developing quantum hardware with functional quantum processors integrating tens of noisy qubits, together with the availability of near-term quantum algorithms has led to the release of the first quantum computers. These quantum computing systems already integrate different software and hardware components of the so-called “full-stack”, bridging quantum applications to quantum devices. In this paper, we will provide an overview on current full-stack quantum computing systems. We will emphasize the need for tight co-design among adjacent layers as well as vertical cross-layer design to extract the most from noisy intermediate-scale quantum (NISQ) processors which are both error-prone and severely constrained in resources. As an example of co-design, we will focus on the development of hardware-aware and algorithm-driven compilation techniques.
The transition from noisy intermediate-scale quantum (NISQ) processors to large-scale fault-tolerant machines requires more than incremental improvements in physical qubit fidelity. While advances in quantum error correction (QEC) theory continue to lower the theoretical overhead of quantum computing, much of this research remains abstracted from the physical realities of qubit implementations. This disconnect often results in hardware-agnostic designs that are inefficient or impractical to build. In this dissertation, I identify three primary gaps between theoretical QEC research and practical hardware: (1) the high levels of noise and temporal instability in experimental devices that impede scalable QEC; (2) the prohibitively large qubit and time costs of useful algorithms, driven largely by the limitations of the standard surface code; and (3) the failure of current resource estimates to account for hardware-level constraints, such as limited connectivity and the complexity of implementing non-local operations. To bridge these gaps, I propose a holistic, cross-stack approach where the error correction protocols and the physical hardware are designed in concert. By developing realistic device models and hardware-aware solutions at the lowest levels of the software stack, we can accelerate the path toward functional fault-tolerance. I present my work across three research thrusts: first, leveraging codesign to mitigate hardware-specific noise and reduce physical error rates; second, developing software tools for fault-tolerant quantum computers to reduce the space-time overhead of the QEC layer; and third, proposing two novel hardware-aware QEC architectures that provide practical, high-performance routes to scalable quantum computation.
Quantum Computing is emerging as one of the great hopes for boosting current computational resources and enabling the application of ICT for optimizing processes and solving complex and challenging domain specific problems. However, the Quantum Computing technology has not matured to a level where it can provide a clear advantage over high performance computing yet. Towards achieving this "quantum advantage", a larger number of Qubits is required, leading inevitably to a more complex topology of the computing Qubits. This raises additional difficulties with decoherence times and implies higher Qubit error rates. Nevertheless, the current Noisy Intermediate-Scale Quantum (NISQ) computers can prove useful despite the intrinsic uncertainties on the quantum hardware layer. In order to utilize such error-prone computing resources, various concepts are required to address Qubit errors and to deliver successful computations. In this paper describe and motivate the need for the novel concept of Quantum DevOps. which entails regular checking of the reliability of NISQ Quantum Computing (QC) instances. By means of testing the computational reliability of basic quantum gates and computations (C-NOT, Hadamard, etc.)it consequently estimates the likelihood for a large scale critical computation (e.g. calculating hourly traffic flow models for a city) to provide results of sufficient quality. Following this approach to select the best matching (cloud) QC instance and having it integrated directly with the processes of development, testing and finally the operations of quantum based algorithms and systems enables the Quantum DevOps concept.
In recent years, Quantum Computing (QC) has progressed to the point where small working prototypes are available for use. Termed Noisy Intermediate-Scale Quantum (NISQ) computers, these prototypes are too small for large benchmarks or even for Quantum Error Correction, but they do have sufficient resources to run small benchmarks, particularly if compiled with optimizations to make use of scarce qubits and limited operation counts and coherence times. QC has not yet, however, settled on a particular preferred device implementation technology, and indeed different NISQ prototypes implement qubits with very different physical approaches and therefore widely-varying device and machine characteristics. Our work performs a full-stack, benchmark-driven hardware-software analysis of QC systems. We evaluate QC architectural possibilities, software-visible gates, and software optimizations to tackle fundamental design questions about gate set choices, communication topology, the factors affecting benchmark performance and compiler optimizations. In order to answer key cross-technology and cross-platform design questions, our work has built the first top-to-bottom toolflow to target different qubit device technologies, including superconducting and trapped ion qubits which are the current QC front-runners. We use our toolflow, TriQ, to conduct {\em real-system} measurements on 7 running QC prototypes from 3 different groups, IBM, Rigetti, and University of Maryland. From these real-system experiences at QC's hardware-software interface, we make observations about native and software-visible gates for different QC technologies, communication topologies, and the value of noise-aware compilation even on lower-noise platforms. This is the largest cross-platform real-system QC study performed thus far; its results have the potential to inform both QC device and compiler design going forward.