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IEEE International Conference on Soft Computing and Measurements (SCM)

The Quantum Circuits Configurations for the Module of Conjugate Coefficients Permutations when Performing QFT

В. А. Калмычков, Alexander Kukaev, Irina V. Matveeva

Published May 25, 2022• 0 citations
Publisher

Abstract

The module of conjugate coefficients permutation for unification of the quantum Fourier transform is considered. The scheme of quantum circuit adaptation from the logical level of the layout of multi-qubit quantum gates to the physical level of representation based on a set of basic gates is presented. An example of an automatically generated specification of a quantum circuit in the form of a program code in the OpenQASM language is given.

DOI
10.1109/scm55405.2022.9794856

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The module of conjugate coefficients permutation for unification of the quantum Fourier transform is considered. The scheme of quantum circuit adaptation from the logical level of the layout of multi-qubit quantum gates to the physical level of representation based on a set of basic gates is presented. An example of an automatically generated specification of a quantum circuit in the form of a program code in the OpenQASM language is given.
A quantum gate is the quantum analog of the classical logic gate of digital computers. It is a basic structural unit of a quantum circuit which operates on a small number of qubits to deliver a predefined output. A quantum circuit is a graphical representation of the sequence of the quantum gates used and the measurements performed in a quantum computation. Various quantum logic gates, namely, the Hadamard, T phase, NOT, Pauli-X, controlled NOT (CNOT), controlled-Z, SWAP and controlled phase gates as well as higher-level Toffoli and Fredkin gates are described. Conventions of reading quantum circuit diagrams are explained. Operation of a quantum full adder consisting of registers and gates is discussed, elaborating the role of the NOT gate, the sum calculation with CNOTgates and the carry C-out calculation with Toffoli gates. A primary tool used for performing arithmetic operations on a quantum computer is the quantum Fourier transform (QFT). The QFT adder and multiplier circuits are presented.
The article deals with the interrelated set of design flows for quantum circuit, providing an integrative view on the basic procedures of their specifications design. The proposed use of flexible design flows should provide an analysis of model representations of quantum circuits from different sides (levels of perception and technological maintenance), their integration into modern means of development and simulation of quantum computing. The results of our approach application are demonstrated. Multistage procedures for designing of quantum circuits specifications with necessary characteristics are considered by means of the example of fixed polarity Reed-Muller expressions synthesis. The results of templates using for minimization of SWAP gates groups are presented for the purpose of quantum circuits obtaining in the linearly nearest neighborhood architecture. The analysis of automatically generated specifications of quantum circuits is based on a set of criteria.
Programming quantum computers is a complex endeavor that requires highly specialized knowledge. Given the growing momentum of quantum computing, high-level synthesis of quantum circuits from well-known classical languages could significantly benefit the ecosystem, allowing specialists to focus on the parts of an application where quantum computing offers the greatest advantage, while letting the compiler handle the boilerplate code. To bridge this gap, we present a high-level synthesis framework that translates C programs into quantum circuits through a sequence of modular and structured Multi-Level Intermediate Representation (MLIR) dialects. These dialects expose classical control and data flow in a form compatible with quantum constraints, enabling reversible and unitary circuit generation. Our framework maps conditionals, loops, and arithmetic operations, supports configurable bitwidths, and allows retargetability to different quantum backends. Furthermore, we demonstrate a correlation between classical program metrics—such as instruction count and cyclomatic complexity—and the performance characteristics of the resulting quantum circuits. To validate our methodology, we quantify compilation resource usage, showing a linear scaling of memory footprint and a quadratic scaling of CPU time as a function of quantum circuit complexity. Our tool generates circuits in OpenQASM format, facilitating integration with current quantum programming frameworks.
In the paper, we consider quantum circuits for the Quantum Fourier Transform (QFT) algorithm. We present a generic method for constructing quantum circuits for QFT on quantum devices with restrictions. Many quantum devices (for example, based on superconductors) have restrictions on applying two-qubit gates presented by a qubit connectivity graph. Typically, researchers consider only the linear nearest neighbor (LNN) architecture, but current devices have more complex graphs. We present a method for arbitrary connected graphs that minimizes the number of CNOT gates in the circuit for implementing on such architecture.
Quantum computing remains in the Noisy Intermediate-Scale Quantum (NISQ) era, with performance constrained by noise. Addressing this limitation requires hardware-facing capabilities beyond gate sequences: mid-circuit measurement and classical feedback for quantum error correction (QEC), precise timing for dynamical decoupling (DD), and pulse-level waveform access for calibration. OpenQASM 3 exposes these capabilities through a hardware-level programming interface. Despite rapid progress in large language models (LLMs) for code generation, datasets targeting these advanced features remain lacking. We introduce QASM-Eval, the first comprehensive dataset to train and evaluate LLMs on OpenQASM 3, targeting completion of hardware-facing constructs within a supplied program context. QASM-Eval comprises an expert-curated test set of 1,200 tasks and a training set of over 4,000 tasks, covering classical logic, timing scheduling, pulse control, and complex tasks inspired by quantum-control workflows. An extended verifier automatically checks syntax, quantum measurement distributions, and program timelines. Our evaluation identifies substantial headroom for OpenQASM 3 code generation and significant gains from targeted fine-tuning. Fine-tuned Llama-3-8B outperforms zero-shot GPT-5.6-Terra, while fine-tuned Llama-3-70B achieves 61.17% overall pass@1 and approaches few-shot-augmented GPT-5.6-Terra. QASM-Eval provides a benchmark and training resource for specification-guided code generation over the hardware-facing constructs of OpenQASM 3, supporting the development of LLM assistants for quantum programming. Data and code: https://github.com/fuzhenxiao/QASM-Eval
In the paper, we consider quantum circuits for the Quantum Fourier Transform (QFT) algorithm. The QFT algorithm is a very popular technique used in many quantum algorithms. We present a generic method for constructing quantum circuits for this algorithm implementing on quantum devices with restrictions. Many quantum devices (for example, based on superconductors) have restrictions on applying two-qubit gates. These restrictions are presented by a qubit connectivity graph. Typically, researchers consider only the linear nearest neighbor (LNN) architecture of the qubit connection, but current devices have more complex graphs. We present a method for arbitrary connected graphs that minimizes the number of CNOT gates in the circuit for implementing on such architecture. We compare quantum circuits built by our algorithm with existing quantum circuits optimized for specific graphs that are Linear-nearest-neighbor (LNN) architecture, ``sun'' (a cycle with tails, presented by the 16-qubit IBMQ device) and ``two joint suns'' (two joint cycles with tails, presented by the 27-qubit IBMQ device). Our generic method gives similar results with existing optimized circuits for ``sun'' and ``two joint suns'' architectures, and a circuit with slightly more CNOT gates for the LNN architecture. At the same time, our method allows us to construct a circuit for arbitrary connected graphs.