Currently available quantum computers are prone to errors. Circuit optimization and error mitigation methods are needed to design quantum circuits to achieve better fidelity when executed on NISQ hardware. Dynamical decoupling (DD) is generally used to suppress the decoherence error and different DD strategies have been proposed. Moreover, the circuit fidelity can be improved by pulselevel optimization, such as creating hardware-native pulse-efficient gates. This paper implements all the popular DD sequences and evaluates their performances on IBM quantum chips with different characteristics for various well-known quantum applications. Also, we investigate combining DD with pulse-level optimization method and apply them to QAOA to solve Max-Cut problem. Based on the experimental results, we found that DD can be a benefit for only certain types of quantum algorithms, while the combination of DD and pulse-level optimization methods always has a positive impact. Finally, we provide several guidelines for users to learn how to use these pulse-level noise mitigation methods to build circuits for quantum applications with high fidelity.
Currently available quantum computers are prone to errors. Circuit optimization and error mitigation methods are needed to design quantum circuits to achieve better fidelity when executed on NISQ hardware. Dynamical decoupling (DD) is generally used to suppress the decoherence error and different DD strategies have been proposed. Moreover, the circuit fidelity can be improved by pulselevel optimization, such as creating hardware-native pulse-efficient gates. This paper implements all the popular DD sequences and evaluates their performances on IBM quantum chips with different characteristics for various well-known quantum applications. Also, we investigate combining DD with pulse-level optimization method and apply them to QAOA to solve Max-Cut problem. Based on the experimental results, we found that DD can be a benefit for only certain types of quantum algorithms, while the combination of DD and pulse-level optimization methods always has a positive impact. Finally, we provide several guidelines for users to learn how to use these pulse-level noise mitigation methods to build circuits for quantum applications with high fidelity.
Currently available quantum computers are prone to errors. Circuit optimization and error mitigation methods are needed to design quantum circuits to achieve better fidelity when executed on NISQ hardware. Dynamical decoupling (DD) is generally used to suppress the decoherence error and different DD strategies have been proposed. Moreover, the circuit fidelity can be improved by pulse-level optimization, such as creating hardware-native pulse-efficient gates. This paper implements all the popular DD sequences and evaluates their performances on IBM quantum chips with different characteristics for various well-known quantum applications. Also, we investigate combining DD with pulse-level optimization method and apply them to QAOA to solve Max-Cut problem. Based on the experimental results, we found that DD can be a benefit for only certain types of quantum algorithms, while the combination of DD and pulse-level optimization methods always has a positive impact. Finally, we provide several guidelines for users to learn how to use these noise mitigation methods to build circuits for quantum applications with high fidelity on IBM quantum computers.
Noisy Intermediate-Scale Quantum (NISQ) computers suffer from gate errors, decoherence, and readout noise that can severely impact even small quantum circuits. In this work, the application of error mitigation techniques was investigated to a simple two-bit quantum comparator circuit executed on real IBM Quantum hardware. The 2-bit comparator is a basic quantum logic circuit that compares two 2-qubit binary numbers and outputs whether the first number is greater than, equal to, or less than the second. This comparator was implemented using Qiskit and studied its performance under realistic noise. This study on error mitigation concentrates on dynamical decoupling (DD), which is a coherent error suppression strategy that cancels coherent errors by inserting echo pulse sequences during idle time periods. The results demonstrate that dynamical decoupling improves accuracy for the comparator circuit - accurate outcomes are closer to the ideal outcome in the absence of noise. These results show that dynamical decoupling yields notable accuracy improvements for the comparator circuit - bringing measured outcomes closer to the ideal noiseless results. A performance analysis (including a bar-chart of accuracy after mitigation vs. before mitigation simulation) is presented to quantify these improvements. Finally, the implications of applying error mitigation in small quantum circuits and its relevance for near-term quantum computing are also discussed, where such techniques can enhance the reliability of quantum computations in the absence of full quantum error correction.
Dynamical decoupling (DD) is a promising technique for mitigating errors in near-term quantum devices. However, its effectiveness depends on both hardware characteristics and algorithm implementation details. This paper explores the synergistic effects of dynamical decoupling and optimized circuit design in maximizing the performance and robustness of algorithms on near-term quantum devices. By utilizing eight IBM quantum devices, we analyze how hardware features and algorithm design impact the effectiveness of DD for error mitigation. Our analysis takes into account factors such as circuit fidelity, scheduling duration, and hardware-native gate set. We also examine the influence of algorithmic implementation details, including specific gate decompositions, DD sequences, and optimization levels. The results reveal an inverse relationship between the effectiveness of DD and the inherent performance of the algorithm. Furthermore, we emphasize the importance of gate directionality and circuit symmetry in improving performance. This study offers valuable insights for optimizing DD protocols and circuit designs, highlighting the significance of a holistic approach that leverages both hardware features and algorithm design for the high-quality and reliable execution of near-term quantum algorithms.
Dynamic quantum circuits integrate mid-circuit measurements and feed-forward operations to enable real-time classical processing and conditional quantum logic. These capabilities are central to key quantum protocols such as quantum error correction, and have recently demonstrated significant potential for reducing quantum resources, including circuit depth and gate count, across a range of applications. However, executing dynamic circuits on real quantum hardware introduces a critical trade-off: while resource requirements decrease, circuit fidelity degrades due to high error rates of mid-circuit measurements, as well as the decoherence errors accumulated during the extended idle periods introduced by both mid-circuit measurements and feed-forward operations. In this paper, we systematically investigate the impact of standard error mitigation techniques on dynamic circuit applications pertaining to Hamiltonian simulation and ground state estimation of physically relevant systems like the Heisenberg model. We explore dynamical decoupling (DD) as a strategy to suppress decoherence and crosstalk errors during idle windows introduced by mid-circuit measurements and feed-forward delays, and also examine error mitigation via zero-noise extrapolation (ZNE). Through experiments conducted on IBM quantum hardware, we benchmark effective combinations of these strategies that maximize the practical benefits of dynamic quantum circuits in these applications. We demonstrate that a combination of DD and ZNE is effective in mitigating the errors introduced during mid-circuit measurements and feed-forward operations, as well as the errors arising from faulty measurements. This approach yields a energy gap improvement of at least 60% in ground state estimation and reduces observed error of time-evolved states by up to 99% for the Ising model and up to 20% for the Heisenberg model.
Dynamical decoupling (DD) is a promising technique for mitigating errors in near-term quantum devices. However, its effectiveness depends on both hardware characteristics and algorithm implementation details. This paper explores the synergistic effects of dynamical decoupling and optimized circuit design in maximizing the performance and robustness of algorithms on near-term quantum devices. By utilizing eight IBM quantum devices, we analyze how hardware features and algorithm design impact the effectiveness of DD for error mitigation. Our analysis takes into account factors such as circuit fidelity, scheduling duration, and hardware-native gate set. We also examine the influence of algorithmic implementation details, including specific gate decompositions, DD sequences, and optimization levels. The results reveal an inverse relationship between the effectiveness of DD and the inherent performance of the algorithm. Furthermore, we emphasize the importance of gate directionality and circuit symmetry in improving performance. This study offers valuable insights for optimizing DD protocols and circuit designs, highlighting the significance of a holistic approach that leverages both hardware features and algorithm design for the high-quality and reliable execution of near-term quantum algorithms.
Dynamical decoupling (DD) refers to a well-established family of methods for error mitigation, comprising pulse sequences aimed at averaging away slowly evolving noise in quantum systems. Here we revisit the question of its efficacy in the presence of noisy pulses in scenarios important for quantum devices today: pulses with gate control errors, and the computational setting where DD is used to reduce noise in every computational gate. We focus on the well-known schemes of periodic (or universal) DD and its extension, concatenated DD, for scaling up its power. The qualitative conclusions from our analysis of these two schemes nevertheless apply to other DD approaches. In the presence of noisy pulses, DD does not always mitigate errors. It does so only when the added noise from the imperfect DD pulses does not outweigh the increased ability in averaging away the original background noise. We present break-even conditions that delineate when DD is useful, and further find that there is a limit in the performance of concatenated DD, specifically in how far one can concatenate the DD pulse sequences before the added noise no longer offers any further benefit in error mitigation.