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The Journal of Supercomputing

Implementation of three efficient 4-digit fault-tolerant quantum carry lookahead adders

Francisco José Orts, Gloria Ortega, Ernestas Filatovas, Ester Martín Garzón

Published Mar 16, 2022• 12 citations
Publisher

Abstract

Abstract Adders are one of the most interesting circuits in quantum computing due to their use in major algorithms that benefit from the special characteristics of this type of computation. Among these algorithms, Shor’s algorithm stands out, which allows decomposing numbers in a time exponentially lower than the time needed to do it with classical computation. In this work, we propose three fault-tolerant carry lookahead adders that improve the cost in terms of quantum gates and qubits with respect to the rest of quantum circuits available in the literature. Their optimal implementation in a real quantum computer is also presented. Finally, the work ends with a rigorous comparison where the advantages and disadvantages of the proposed circuits against the rest of the circuits of the state of the art are exposed. Moreover, the information obtained from such a comparison is summarized in tables that allow a quick consultation to interested researchers.

DOI
10.1007/s11227-022-04401-x

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Abstract Adders are one of the most interesting circuits in quantum computing due to their use in major algorithms that benefit from the special characteristics of this type of computation. Among these algorithms, Shor’s algorithm stands out, which allows decomposing numbers in a time exponentially lower than the time needed to do it with classical computation. In this work, we propose three fault-tolerant carry lookahead adders that improve the cost in terms of quantum gates and qubits with respect to the rest of quantum circuits available in the literature. Their optimal implementation in a real quantum computer is also presented. Finally, the work ends with a rigorous comparison where the advantages and disadvantages of the proposed circuits against the rest of the circuits of the state of the art are exposed. Moreover, the information obtained from such a comparison is summarized in tables that allow a quick consultation to interested researchers.
Quantum circuits of arithmetic operations such as addition are needed to implement quantum algorithms in hardware. Quantum circuits based on Clifford+T gates are used as they can be made tolerant to noise. The tradeoff of gaining fault tolerance from using Clifford+T gates and error correcting codes is the high implementation overhead of the T gate. As a result, the T-count performance measure has become important in quantum circuit design. Due to noise, the risk for errors in a quantum circuit computation increases as the number of gate layers (or depth) in the circuit increases. As a result, low depth circuits such as quantum carry lookahead adders (QCLA)s have caught the attention of researchers. This work presents two QCLA designs each optimized with emphasis on T-count or qubit cost respectively. In-place and out-of-place versions of each design are shown. The proposed QCLAs are compared against the existing works in terms of T-count. The proposed QCLAs for out-of-place addition achieve average T gate savings of 54.34%54.34 \%54.34% and 37.21%37.21 \%37.21%, respectively. The proposed QCLAs for in-place addition achieve average T gate savings of 72.11%72.11 \%72.11% and 35.87%35.87 \%35.87%
Progress in quantum hardware design is progressing toward machines of sufficient size to begin realizing quantum algorithms in disciplines such as encryption and physics. Quantum circuits for addition are crucial to realize many quantum algorithms on these machines. Ideally, quantum circuits based on fault-tolerant gates and error-correcting codes should be used as they tolerant environmental noise. However, current machines called Noisy Intermediate Scale Quantum (NISQ) machines cannot support the overhead associated with fault-tolerant design. In response, low depth circuits such as quantum carry lookahead adders (QCLA)s have caught the attention of researchers. The risk for noise errors and decoherence increase as the number of gate layers (or depth) in the circuit increases. This work presents an out-of-place QCLA based on Clifford+T gates. The QCLAs optimized for T gate count and make use of a novel uncomputation gate to save T gates. We base our QCLAs on Clifford+T gates because they can eventually be made fault-tolerant with error-correcting codes once quantum hardware that can support fault-tolerant designs becomes available. We focus on T gate cost as the T gate is significantly more costly to make fault-tolerant than the other Clifford+T gates. The proposed QCLAs are compared and shown to be superior to existing works in terms of T-count and therefore the total number of quantum gates. Finally, we illustrate the application of the proposed QCLAs in quantum image processing by presenting quantum circuits for bilinear interpolation.
Progress in quantum hardware design is progressing toward machines of sufficient size to begin realizing quantum algorithms in disciplines such as encryption and physics. Quantum circuits for addition are crucial to realize many quantum algorithms on these machines. Ideally, quantum circuits based on fault-tolerant gates and error-correcting codes should be used as they tolerant environmental noise. However, current machines called Noisy Intermediate Scale Quantum (NISQ) machines cannot support the overhead associated with faulttolerant design. In response, low depth circuits such as quantum carry lookahead adders (QCLA)s have caught the attention of researchers. The risk for noise errors and decoherence increase as the number of gate layers (or depth) in the circuit increases. This work presents an out-of-place QCLA based on Clifford+T gates. The QCLAs optimized for T gate count and make use of a novel uncomputation gate to save T gates. We base our QCLAs on Clifford+T gates because they can eventually be made faulttolerant with error-correcting codes once quantum hardware that can support fault-tolerant designs becomes available. We focus on T gate cost as the T gate is significantly more costly to make faulttolerant than the other Clifford+T gates. The proposed QCLAs are compared and shown to be superior to existing works in terms of T-count and therefore the total number of quantum gates. Finally, we illustrate the application of the proposed QCLAs in quantum image processing by presenting quantum circuits for bilinear interpolation.
Quantum Computing is making significant advancements toward creating machines capable of implementing quantum algorithms in various fields, such as quantum cryptography, quantum image processing, and optimization. The development of quantum arithmetic circuits for modulo addition is vital for implementing these quantum algorithms. While it is ideal to use quantum circuits based on fault-tolerant gates to overcome noise and decoherence errors, the current Noisy Intermediate Scale Quantum (NISQ) era quantum computers cannot handle the additional computational cost associated with fault-tolerant designs. Our research aims to minimize circuit depth, which can reduce noise and facilitate the implementation of quantum modulo addition circuits on NISQ machines. This work presents quantum carry-lookahead modulo (2n - 1) adder (QCLMA), which is designed to receive two n-bit numbers and perform their addition with an O(log n) depth. Compared to existing work of O(n) depth, our proposed QCLMA reduces the depth and helps increase the noise fidelity. In order to increase error resilience, we also focus on creating a tree structure based Carry path, unlike the chain based Carry path of the current work. We run experiments on Quantum Computer IBM Cairo to evaluate the performance of the proposed QCLMA against the existing work and define Quantum State Fidelity Ratio (QSFR) to quantify the closeness of the correct output to the top output. When compared against existing work, the proposed QCLMA achieves a 47.21% increase in QSFR for 4-qubit modulo addition showcasing its superior noise fidelity.
With the emergence of quantum physics and computer science in the 20th century, a new era was born which can solve very difficult problems in a much faster rate or problems that classical computing just can't solve. In the 21st century, quantum computing needs to be used to solve tough problems in engineering, business, medical, and other fields that required results not today but yesterday. To make this dream come true, engineers in the semiconductor industry need to make the quantum circuits a reality. To realize quantum circuits and make them scalable, they need to be fault tolerant, therefore Clifford+T gates need to be implemented into those circuits. But the main issue is that in the Clifford+T gate set, T gates are expensive to implement. Carry Look-Ahead addition circuits have caught the interest of researchers because the number of gate layers encountered by a given qubit in the circuit (or the circuit's depth) is logarithmic in terms of the input size n. Therefore, this thesis focuses on optimizing previous designs of out-of-place and in-place Carry Look-Ahead Adders to decrease the T-count, sum of all T and T Hermitian transpose gates in a quantum circuit.
In recent years, quantum computers have attracted extensive research interests due to their potential capability of solving problems which are not easily solvable using classical computers. In parallel to the constant research aiming at the physical implementation of quantum processors, there is another branch of research developing quantum algorithms for real-life applications, many of which need to perform arithmetic operations. As one of the most important operations, quantum addition has been adopted in Shor's algorithm, quantum linear algebra algorithms and various quantum machine learning applications. Since precision is always a non-trivial issue to determine during the computation, most-significant digit-first quantum addition can be a fundamental operation for variable precision computing. Therefore, this paper proposes the first quantum adder circuit that is able to compute from the most-significant digits, which demonstrates the advantages over the state-of-the-art quantum adders requiring carry propagation to produce results from least-significant digits. We first present a review of quantum addition circuits design, and then propose a novel method to implement quantum most-significant digit-first adders. Scalability and quantitative comparisons for different quantum full adder, quantum carry-ripple adder and quantum most-significant digit-first adder circuits have been investigated, where all circuits are implemented on IBM Qiskit SDK.