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Design and performance of selected classes of Tanner codes

Shadi Abu‐Surra, Gianluigi Liva, W.E. Ryan

Published Feb 10, 2006• 8 citations
OpenAlex

Abstract

We study the design of structured Tanner codes with low error-rate floors on the binary additive white Gaussian noise channel (BAWGNC) and the binary erasure channel (BEC). The design technique involves the “doping of standard LDPC protographs, meaning Hamming or recursive systematic convolutional (RSC) code constraints are used together with singleparity-check (SPC) constraints to construct a code’s protograph. We show that the doping of a “good graph with Hamming or RSC codes is a pragmatic approach that frequently results in a code with a good threshold and very low error-rate floor. We focus on low-rate Tanner codes, in part because the design of low-rate, low-floor LDPC codes is particularly difficult.

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Protograph low-density-parity-check (LDPC) are considered to design near-capacity low-rate codes over the binary erasure channel (BEC) and binary additive white Gaussian noise (BIAWGN) channel. For protographs with degree-one variable nodes and doubly-generalized LDPC (DGLDPC) codes, conditions are derived to ensure equality of bit-error threshold and block-error threshold. Using this condition, low-rate codes with block-error threshold close to capacity are designed and shown to have better error rate performance than other existing codes.

arXiv:1710.09651•Oct 26, 2017•1 citation
We study the design of structured Tanner codes with low error-rate floors on the binary additive white Gaussian noise channel (BAWGNC) and the binary erasure channel (BEC). The design technique involves the “doping of standard LDPC protographs, meaning Hamming or recursive systematic convolutional (RSC) code constraints are used together with singleparity-check (SPC) constraints to construct a code’s protograph. We show that the doping of a “good graph with Hamming or RSC codes is a pragmatic approach that frequently results in a code with a good threshold and very low error-rate floor. We focus on low-rate Tanner codes, in part because the design of low-rate, low-floor LDPC codes is particularly difficult.
We study the design of structured Tanner codes with low error-rate floors on the AWGN channel. The design technique involves the “doping” of standard LDPC (proto-)graphs, by which we mean Hamming or recursive systematic convolutional (RSC) code constraints are used together with single-parity-check (SPC) constraints to construct a code’s protograph. We show that the doping of a “good” graph with Hamming or RSC codes is a pragmatic approach that frequently results in a code with a good threshold and very low error-rate floor. We focus on low-rate Tanner codes, in part because the design of low-rate, low-floor LDPC codes is particularly difficult. Lastly, we perform a simple complexity analysis of our Tanner codes and examine the performance of lower-complexity, suboptimal Hamming-node decoders.
In this paper, a novel methodology for designing structured generalized LDPC (G-LDPC) codes is presented. The proposed design results in quasi-cyclic G-LDPC codes for which efficient encoding is feasible through shift-register-based circuits. The structure imposed on the bipartite graphs, together with the choice of simple component codes, leads to a class of codes suitable for fast iterative decoding. A pragmatic approach to the construction of G-LDPC codes is proposed. The approach is based on the substitution of check nodes in the protograph of a low-density parity-check code with stronger nodes based, for instance, on Hamming codes. Such a design approach, which we call LDPC code doping, leads to low-rate quasi-cyclic G-LDPC codes with excellent performance in both the error floor and waterfall regions on the additive white Gaussian noise channel.
Tanner codes represent a broad class of graph-based coding schemes, including low-density parity-check (LDPC) and turbo codes. Whereas many different classes of LDPC and turbo codes have been proposed and studied in the past decade, very little work has been performed on the broader class of Tanner codes. In this paper we propose a design technique which leads to efficiently encodable quasi-cyclic Tanner codes based on both Hamming and single parity check (SPC) nodes. These codes are characterized by fast message-passing decoders and can be encoded using shift-register-based circuits. The resulting schemes exhibit excellent performance in both the error floor and waterfall regions on the additive white Gaussian noise channel. 1
In this paper, a novel methodology for designing structured generalized low-density parity-check (G-LDPC) codes is presented. The proposed design results in quasi-cyclic G-LDPC codes for which efficient encoding is feasible through shift-register-based circuits. The structure imposed on the bipartite graphs, together with the choice of simple component codes, leads to a class of codes suitable for fast iterative decoding. A pragmatic approach to the construction of G-LDPC codes is proposed. The approach is based on the substitution of check nodes in the protograph of a low-density parity-check code with stronger nodes based, for instance, on Hamming codes. Such a design approach, which we call low-density parity-check (LDPC) code doping, leads to low-rate quasi-cyclic G-LDPC codes with excellent performance in both the error floor and waterfall regions on the additive white Gaussian noise channel.
While it is fairly easy to design good low-density parity-check codes with medium or large block lengths, and with code rates 1/2 or greater, much more effort is required for short lengths and low rates. We propose a code structure which incorporates Hamming codes into a code's graph, leading to a type of a Tanner code. The incorporation of Hamming codes into the graph, which we call "Hamming code doping", tends to lead to larger minimum distances and hence low error-rate floors. We present an iterative decoding algorithm tailored to graphs possessing "Hamming nodes". Further, a density evolution analysis based on the Gaussian approximation is presented, which is a useful tool for finding good codes. Finally, we present numerical results of some Hamming-doped Tanner codes simulated on the AWGN channel. The simulated codes exhibit remarkably low error floors, while simultaneously displaying good decoding thresholds
Protograph low-density-parity-check (LDPC) are considered to design near-capacity low-rate codes over the binary erasure channel (BEC) and binary additive white Gaussian noise (BIAWGN) channel. For protographs with degree-one variable nodes and doubly-generalized LDPC (DGLDPC) codes, conditions are derived to ensure equality of bit-error threshold and block-error threshold. Using this condition, low-rate codes with block-error threshold close to capacity are designed and shown to have better error rate performance than other existing codes.