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IEEE Computer Society Annual Symposium on VLSI

Counter Random Gradient Descent Bit-Flipping Decoder for LDPC Codes

Keyue Deng, Hangxuan Cui, Jun Ting Lin, Zhongfeng Wang

Published Jul 1, 2021• 6 citations
Publisher

Abstract

Tabu-list random-penalty gradient descent bit-flipping (TRGDBF) is a hard-decision algorithm for decoding low-density parity-check (LDPC) codes, which offers a significant improvement in error correction. However, compared to the current gradient descent bit-flipping (GDBF) variants, it converges slower and has no obvious performance advantage unless enough iterations are allowed. To accelerate the convergence speed, this paper presents a counter random GDBF (CRGDBF) algorithm in which a bit is forbidden to flip in the next iteration after being flipped several times. Incorporating the random operation, the forbidden-mechanism shows a dynamic property, facilitating the decoder more efficiently to break trapping sets. Simulation results show that the CRGDBF can achieve up to 5 times better decoding performance than the TRGDBF algorithm within finite iterations. Additionally, an architecture is presented for implementing the CRGDBF algorithm, demonstrating it only brings limited hardware overhead compared to the TRGDBF.

DOI
10.1109/isvlsi51109.2021.00021

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Tabu-list random-penalty gradient descent bit-flipping (TRGDBF) is a hard-decision algorithm for decoding low-density parity-check (LDPC) codes, which offers a significant improvement in error correction. However, compared to the current gradient descent bit-flipping (GDBF) variants, it converges slower and has no obvious performance advantage unless enough iterations are allowed. To accelerate the convergence speed, this paper presents a counter random GDBF (CRGDBF) algorithm in which a bit is forbidden to flip in the next iteration after being flipped several times. Incorporating the random operation, the forbidden-mechanism shows a dynamic property, facilitating the decoder more efficiently to break trapping sets. Simulation results show that the CRGDBF can achieve up to 5 times better decoding performance than the TRGDBF algorithm within finite iterations. Additionally, an architecture is presented for implementing the CRGDBF algorithm, demonstrating it only brings limited hardware overhead compared to the TRGDBF.
Low-complexity and high-performance low-density parity-check (LDPC) decoders are highly demanded in various modern communication and storage systems. In this paper, a novel hard-decision decoding algorithm, called tabu-list random-penalty gradient descent bit-flipping (TRGDBF) algorithm, is proposed. Compared to the state-of-the-art hard-decision algorithms, the TRGDBF algorithm has much better error-correction performance due to several algorithmic improvements. First, a random-penalty term is introduced to the inversion function to help the decoder escape from trapping sets, which are the main causes of the error-floor phenomenon. Second, a tabu-list is employed to improve the decoding efficiency. Numerical results show that the TRGDBF algorithm can achieve up to two orders of magnitude better error-correction performance than the probabilistic gradient descent bit-flipping (PGDBF) algorithm and reduce the average iteration count by about 15%. In addition, a well-optimized hardware architecture is developed to implement the TRGDBF algorithm. Algorithmic transformation and architecture optimization are well explored to reduce the hardware complexity and latency. Synthesis results show that the TRGDBF decoder can work at a higher frequency and offer a larger throughput than the PGDBF decoder.
Probabilistic gradient descent bit-flipping (PGDBF) is the state-of-the-art hard-decision algorithm for decoding low-density parity-check (LDPC) codes on binary symmetric channel (BSC). However, there still exists a considerable performance gap between the PGDBF algorithm and soft-decision algorithms, especially in the error-floor region. To bridge this performance gap, a tabu-list aided PGDBF (T-PGDBF) algorithm is proposed in this paper. In the T-PGDBF algorithm, a tabu-list is employed to help the decoding escape from trapping sets, which is the main cause of the error-floor phenomenon. The bits which are flipped in the current iteration will be added to the tabu-list to prevent them being flipped in the next iteration. Simulation results show that the T-PGDBF algorithm offers a significant performance gain when compared to the PGDBF algorithm, which can reach that of soft-decision algorithms. We also present the hardware architecture to implement the T-PGDBF algorithm. Synthesis results show that the improved performance offered by the T-PGDBF algorithm can be obtained with a small hardware overhead.
Tabu-list random-penalty gradient descent bit-flipping (TRGDBF) decoder is the state-of-the-art hard-decision low-density parity-check (LDPC) decoder in terms of error-correction performance on binary symmetric channel (BSC). However, the TRGDBF decoder suffers from a long critical path caused by the global maximum-finding operation, limiting the achievable throughput. This brief proposes an information storage bit-flipping (ISBF) decoder to solve this problem. Different from the existing bit-flipping (BF) decoders which adopt serial decoding manner, in the ISBF decoder, by storing the previous decoding information, the global maximum-finding operation can be executed in parallel to other decoding operations, significantly shortening the critical path. Moreover, a nonuniform flipping rule is incorporated to achieve a better decoding performance. We also present an efficient architecture to implement the ISBF decoder. The design example demonstrates that compared to other hard-decision BF decoders, the ISBF decoder could provide both the best decoding performance and throughput on BSC.
It is known that the Gradient descent bit flipping (GDBF) algorithm is an effective hard-decision decoding algorithm for low-density parity-check (LDPC) codes. However, trapping in a local maximum limits its error-rate performance. This paper presents a modified GDBF scheme that can mitigate the trapping problem and hence can improve the error-rate performance. Compared to the conventional GDBF algorithm, the proposed method is able to improve the decoding performance of 0.3dB for an (18582, 16626) code. The (18582, 16626) LDPC decoder integrates 636k logic gates and achieves a throughput of 12.4 Gbps at a clock frequency of 200 MHz in a 90nm process.
This paper is concerned with bit-flipping algorithms for decoding low-density parity check codes. The gradient-descent bit flipping (GDBF) is known as a high-performance class of bitflipping algorithms; however, once GDBF becomes trapped at local optimal solutions, it cannot escape from them. Several algorithms, including noisy gradient-descent bit flipping (NGDBF), have been devised to overcome this drawback. For the same purpose, we develop a bit-flipping algorithm based on the tabu search, which is one of the most effective metaheuristics. The simulation results demonstrate that our algorithm achieved higher bit error rate performance than GDBF did. Moreover, our algorithm required a smaller number of iterations to find a good-quality solution than NGDBF did.
The Noisy Gradient Descent Bit Flipping (NGDBF) algorithm surpasses the previous Gradient Descent Bit Flipping (GDBF) and other Bit Flipping (BF) algorithms for decoding Low-Density Parity-Check (LDPC) codes. However, the NGDBF decoder sometimes cannot escape from the local maxima. To further enhance the performance of the NGDBF algorithm, an improved NGDBF algorithm called Tabu-List Noisy Gradient Descent Bit Flipping (TNGDBF) is proposed in this paper. A tabu-list is employed to help the NGDBF decoder escape from the local maxima. It is shown in the simulation results that the TNGDBF algorithm gains about 0.2 dB performance compared with NGDBF at the cost of a small amount of complexity increase.