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IEEE European Test Symposium (ETS)

Test Data-Driven Machine Learning Models for Reliable Quantum Circuit Output

Vedika Saravanan, Samah Mohamed Saeed

Published May 24, 2021• 9 citations
Publisher

Abstract

While current quantum computers, referred to as Noisy Intermediate-Scale Quantum (NISQ) computers, are expected to be beneficial for different applications, they are prone to different types of errors. In order to enhance the reliability of quantum systems, noise-aware quantum compilers are used to generate physical quantum circuits to be executed on NISQ computers. The quantum hardware is calibrated very frequently and its error rates are computed accordingly. Based on the hardware error rates, a quantum compiler allocates physical qubits and schedules quantum operations. However, error rates may change post-calibration. To incorporate dynamic error rates into quantum circuit compilation with minimum cost, we propose a Machine Learning (ML)-based scheme to detect the incorrect output of the quantum circuit and predict the Probability of Successful Trials (PST) with high accuracy. Our approach can verify the error rates of the quantum hardware and validate the correctness of the extracted quantum circuit output. We provide a case study of our ML-based reliability models using IBM Q16 Melbourne quantum computer. Our results show that the proposed scheme achieves a very high prediction accuracy.

DOI
10.1109/ets50041.2021.9465405

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While current quantum computers, referred to as Noisy Intermediate-Scale Quantum (NISQ) computers, are expected to be beneficial for different applications, they are prone to different types of errors. In order to enhance the reliability of quantum systems, noise-aware quantum compilers are used to generate physical quantum circuits to be executed on NISQ computers. The quantum hardware is calibrated very frequently and its error rates are computed accordingly. Based on the hardware error rates, a quantum compiler allocates physical qubits and schedules quantum operations. However, error rates may change post-calibration. To incorporate dynamic error rates into quantum circuit compilation with minimum cost, we propose a Machine Learning (ML)-based scheme to detect the incorrect output of the quantum circuit and predict the Probability of Successful Trials (PST) with high accuracy. Our approach can verify the error rates of the quantum hardware and validate the correctness of the extracted quantum circuit output. We provide a case study of our ML-based reliability models using IBM Q16 Melbourne quantum computer. Our results show that the proposed scheme achieves a very high prediction accuracy.
The current advancement in quantum computers has been focusing on increasing the number of qubits and enhancing their fidelity. However, the available quantum devices, known as intermediate scale quantum (NISQ) computers, still suffer from different sources of noise that impact their reliability. Thus, practical noise modeling is of great importance in the development of quantum error mitigation approaches. In this article, we propose a machine learning (ML)-based scheme to predict the output fidelity of the quantum circuit executed on NISQ devices. We show the benefit of using graph neural network (GNN)-based models compared to traditional ML-based models in capturing the quantum circuit structure in addition to its gates’ features, which enable characterizing unpredicted quantum circuit errors. We use different metrics to measure the fidelity of the quantum circuit output. Our experimental results using different quantum algorithms executed on IBM Q Guadalupe quantum computer show the high prediction accuracy of our ML reliability models. Our results also show that our models can guide the single-qubit gate rescheduling to improve the output fidelity of the quantum circuit without the need for prior execution of dedicated calibration circuits.
Hybridizing machine learning (ML) with quantum computing has become an attractive strategy to increase computational power on Noisy Intermediate Scale Quantum (NISQ) devices. Although these can be potentially quantum advantage devices, their qubit numbers and noise are bounded and there are challenges when it comes to practical quantum circuit realization. This work concentrates on the creation of optimized quantum circuits via ML-based strategies, to enhance the performance of the circuits, to reduce the error rate and to accommodate the particular noise profile of the hardware of NISQ devices. The resulting suboptimal mappings with little or no consideration of noise and hardware topology in traditional quantum compilers can ruin the fidelity of quantum algorithm. Leveraging machine learning, and specifically reinforcement and supervised learning methods, our method learns to optimize compilation strategy for specific quantum hardware architecture. The paper proposes a framework that uses machine learning models to predict qubit mappings, gate decompositions, and transpilation paths that minimize gate depth and error accumulation. We also investigate transfer learning methods for propagating the learned compilation strategies to novel NISQ machines. Such methods are empirically validated on both simulated and real quantum hardware backends, providing evidence of circuit depth, execution time and error reductions. The results show that ML-assisted compilation can achieve better success probabilities for benchmark quantum algorithms like VQE and QAOA than conventional compilers. Furthermore, the work examines the interpretability of ML models providing hardware-aware optimization recommendations and understanding the noise patterns and methods of error correction. Our work highlights the key role of ML for transferring between theoretical quantum algorithms and their practical NISQ implementations. This integration boosts the immediate applicability of existing quantum devices and provides a basis for adaptive and scalable likelihood-based compilation for the era of fault-tolerant quantum computation. Our results motivate further investigation of hybrid classical-quantum workflows, in which ML iteratively improves compilation in accordance with changing hardware noise and capabilities. By improving quantum circuit compilation onNISQ computers, this work is taking steps toward the realization of quantum advantage in application scenarios such as optimization, cryptography, and quantum simulation without needing to wait for fully fault-tolerant large-scale quantum computers.
The development of near-term quantum computers, referred to as Noisy Intermediate-Scale Quantum (NISQ) computers, has progressed rapidly in the past few years resulting in several quantum computers which vary in their underlying technology and physical constraints. The performance of these computers also varies from one quantum algorithm to another. To enable efficient selection of the quantum computer that provides the highest output fidelity for a given application, an accurate noise modeling of each quantum hardware is required. However, noise modeling for a given application is a complex problem because of the unknown interaction between the quantum circuit parameters and the noise parameters of NISQ devices. We propose the use of Machine Learning (ML) to model the performance of different quantum computers at the application level. The ML models predict the output fidelity of the quantum application executed on different quantum computers given their publicly available physical constraints. We use a diverse training dataset to cover the key features for application-level benchmarking of the quantum hardware. Our results obtained from different superconducting quantum devices show that our proposed ML models enable cost-effective quantum computer selection for different quantum applications with different fidelity metrics.
Noisy Intermediate-Scale Quantum (NISQ) computers consisting of tens of inherently noisy quantum bits (qubits) suffer from reliability problems. Qubits and their gates are susceptible to various types of errors. Due to limited numbers of qubits and high error rates, quantum error correction cannot be applied. Physical constraints of quantum hardware including the error rates are used to guide the design and the layout of quantum circuits. The error rates determine the selection of qubits and their operations. The resulting circuit is executed on the quantum computer. This study explores the risk of unexpected changes in the error rates of NISQ computers post-calibration. We show that unexpected changes in error rates can alter the output state of a quantum circuit. To detect these changes, we propose the insertion of test points into the quantum circuit to enable online monitoring of the physical qubit behavior. We utilize classical, superposition, and uncompute test points. Furthermore, we use a gate error coverage metric to assess the quality of the tests. We verify the effectiveness of the proposed scheme on different IBM quantum computers (IBM Q), in addition to a noisy simulation that shows the scalability of the proposed approach.
Quantum circuit compilers play an important role in mitigating errors of quantum circuits executed on Noisy Intermediate-Scale Quantum (NISQ) computers. The compiler maps the quantum algorithm into a physical quantum circuit that satisfies the physical constraints of NISQ architecture. However, the reliability of NISQ computers is still very challenging. In this work, we design a new class of quantum test circuits using flag qubits based on error propagation. Furthermore, we automate the test point insertion. Our approach can detect errors at different points in the circuit to assess its output reliability. The goal is to select a qubit allocation that improves the quantum circuit output fidelity. We show the effectiveness of our approach using an IBM quantum computer and a noisy simulator.
Maximizing the computational utility of near-term quantum processors requires predictive noise models that inform robust, noise-aware compilation and error mitigation. Conventional models often fail to capture the complex error dynamics of real hardware or require prohibitive characterization overhead. We introduce a data-efficient framework that first constructs a physically motivated, parameterized noise model, and subsequently employs machine-learning-driven Bayesian optimization to identify its parameters. Our approach circumvents costly characterization protocols by estimating algorithm- and hardware-specific error parameters directly from readily available experimental data derived from existing application and benchmark circuit executions. The generality and robustness of the framework are demonstrated across diverse algorithms and superconducting devices, yielding high-fidelity predictions by estimating an independent parameter set tailored to each specific algorithm-hardware context. Crucially, we show that a model calibrated exclusively on small-scale circuits accurately predicts the behavior of larger validation circuits. Our data-efficient approach achieves up to a 65% improvement in model fidelity quantified by the Hellinger distance between predicted and experimental circuit output distributions, compared to standard noise models derived from device properties. This work establishes a practical paradigm for application-aware noise characterization, enabling compilation and error-mitigation strategies tailored to the specific interplay between quantum algorithms and device-specific noise dynamics.