quantum computing is the emerging technology in the new era and is very promising, not only quantum computers substantially accelerate what classical computers are able to do nowadays but they are also capable of providing answers that classical computers never could. Using reversible logic in designing quantum circuits has many advantages such as lowering power consumption, reducing heat dissemination, and decreasing quantum cost, ancilla inputs, and garbage outputs that lead to even higher performance in quantum computers. Decoders have many utilizations in digital circuits any function in form of SOP or POS can be implemented using decoders, counters, and ROMs have also used decoder modules in their designs in this article two novel designs for 2:4 and 3:8 decoder have been proposed that has been proved to have less quantum cost, unused outputs, and ancilla inputs when it comes to comparison with recent researches that have been done concerning this field.
quantum computing is the emerging technology in the new era and is very promising, not only quantum computers substantially accelerate what classical computers are able to do nowadays but they are also capable of providing answers that classical computers never could. Using reversible logic in designing quantum circuits has many advantages such as lowering power consumption, reducing heat dissemination, and decreasing quantum cost, ancilla inputs, and garbage outputs that lead to even higher performance in quantum computers. Decoders have many utilizations in digital circuits any function in form of SOP or POS can be implemented using decoders, counters, and ROMs have also used decoder modules in their designs in this article two novel designs for 2:4 and 3:8 decoder have been proposed that has been proved to have less quantum cost, unused outputs, and ancilla inputs when it comes to comparison with recent researches that have been done concerning this field.
Reversible computation differs from traditional computation in that it preserves information while manipulating it. This new design paradigm has very attractive thermodynamic consequences and holds many applications in current and emerging technologies. Modern computers can reduce power consumption by taking advantage of reversibility, and quantum computers operate reversibly. Researchers have already proposed reversible designs of many common arithmetic and logical units, including adders, multipliers, shifters, and even registers. Very little focused work has been done specifically on reversible encoder/decoder design. In this paper we propose a novel reversible encoder/decoder design and analyze it in terms of its quantum cost, garbage outputs, constant inputs, and quantum delay.
Quantum computation is modeled by quantum circuits. All the quantum operations are reversible so the quantum circuits can be built using reversible logic gates. Reversible computing is the emerging technology, its major role is in the field of quantum computing, optical computing, and design of low power nanocircuits. The most frequently used computational unit for digital signal processing and multimedia applications is multiplier. To compute square of an operand, regular multipliers are used in general. This paper proposes a dedicated quantum circuit for computing square of an operand efficiently compared to the existing multipliers in the literature. The squaring unit is mathematically modeled and its metrics quantum cost, garbage outputs and ancilla input, gate count are calculated. We compared the proposed design with the existing multipliers to compute square and found that proposed square unit is efficient in terms of quantum cost, garbage outputs, ancilla inputs and gate count. The proposed reversible square circuit has 63% to 85% improvement of quantum cost, garbage outputs, ancilla inputs and gate count over existing reversible multiplier circuits.
Reversible logic is one of the emerging technologies having promising applications in quantum computing. In this work, we present new design of the reversible BCD adder that has been primarily optimized for the number of ancilla input bits and the number of garbage outputs. The number of ancilla input bits and the garbage outputs is primarily considered as an optimization criteria as it is extremely difficult to realize a quantum computer with many qubits. As the optimization of ancilla input bits and the garbage outputs may degrade the design in terms of the quantum cost and the delay, thus the quantum cost and the delay parameters are also considered for optimization with primary focus towards the optimization of the number of ancilla input bits and the garbage outputs. Firstly, we propose a new design of the reversible ripple carry adder having the input carry Co and is designed with no ancilla input bits. The proposed reversible ripple carry adder design with no ancilla input bits has less quantum cost and the logic depth (delay) compared to its existing counterparts. The existing reversible Peres gate and a new reversible gate called the TR gate is efficiently utilized to improve the quantum cost and the delay of the reversible ripple carry adder. The improved quantum design of the TR gate is also illustrated. Finally, the reversible design of the BCD adder is presented which is based on a 4 bit reversible binary adder to add the BCD number, and finally the conversion of the binary result to the BCD format using a reversible binary to BCD converter.
In recent years, reversible logic circuits have applications in the emerging field of digital signal processing, optical information processing, quantum computing and nano technology. Reversibility plays an important role when computations with minimal energy dissipation are considered. The main purpose of designing reversible logic is to decrease the number of reversible gates, garbage outputs, constant inputs, quantum cost, area, power, delay and hardware complexity of the reversible circuits. This paper reveals a comparative review on various reversible logic gates. This paper provides some reversible logic gates, which can be used in designing more complex systems having reversible circuits and can execute more complicated operations using quantum computers. Future digital technology will use reversible logic gates in order to reduce the power consumption and propagation delay as it effectively provides negligible loss of information in the circuit. Keywords: Garbage output, Power dissipation, quantum cost, Reversible Gate, Reversible logic,
The technologies like quantum computing, Nanotechnology is emerging due to the greater research in reversible logic. It has the power reduction capability the same mechanism is also having in the quantum computing. Designing a quantum circuit among various combinational circuits the decoder has capability to change binary information of input lines to distinct output lines and also there are many applications where decoder is the main basic component. In this paper a comprehensive introduction of basic gates used to design n to 2nUniversal Quantum decoder, here n represents the no of inputs are mentioned. The proposed 2:4 decoder circuit is designed using a universal reversible Fredkin gates and Feynman gate. The proposed work is simulated using IBM Quantum Composer. In comparison to existing quantum decoders the proposed decoder design has optimum values in all the parameters considered.
The reversible logic has promising applications in emerging computing paradigms, such as quantum computing, quantum dot cellular automata, optical computing, etc. In reversible logic gates, there is a unique one-to-one mapping between the inputs and outputs. To generate a useful gate function, the reversible gates require some constant ancillary inputs called ancilla inputs. Also to maintain the reversibility of the circuits some additional unused outputs are required that are referred to as the garbage outputs. The number of ancilla inputs, the number of garbage outputs and quantum cost plays an important role in the evaluation of reversible circuits. Thus minimizing these parameters are important for designing an efficient reversible circuit. Reversible circuits are of highest interest in optical computing, quantum dot cellular automata and quantum computing. The quantum gates perform an elementary unitary operation on one, two or more two-state quantum systems called qubits. Any unitary operation is reversible in nature, and hence, quantum networks are also reversible, to conclude the quantum computers must be built from reversible logic components. The main contribution of this dissertation is the design exploration and application of reversible circuits in emerging nanotechnologies. The emerging technologies explored in this work are 1) Optical quantum computing 2) Quantum computing. The first contribution of this dissertation is Mach-Zehnder interferometer based design of all optical reversible binary adder. The all optical reversible adder design is based on two new optical reversible gates referred as optical reversible gate I (ORG-I) and optical reversible gate II (ORG-II) and the existing all optical Feynman gate. The two new reversible gates ORG-I and ORGI-II have been proposed and can implement a reversible adder with a reduced optical cost which is equal to the number of MZI switches required, less propagation delay, and with zero overhead in terms of number of ancilla inputs and the garbage outputs. The proposed all optical reversible adder design based on the ORG-I and ORG-II reversible gates are compared and shown to be better than the other existing designs of reversible adder proposed in the non-optical domain in terms of number of MZI switches, delay, the number of ancilla inputs and the garbage outputs. The proposed all optical reversible adder will be a key component of an all optical reversible arithmetic logical unit (ALU), that is a quite essential component in a wide variety of optical signal processing applications. In the existing literature, the NAND logic based implementation is the only known implementation available for reversible gates and its functions. There is a lack of research in the direction of NOR logic based implementation of reversible gates and functions. The second contribution of this dissertation is the design of NOR logic based n-input and n-output reversible gates, one of which can be efficiently mapped into optical computing using the Mach-Zehnder interferometer (MZI), while the other can be mapped efficiently in optical computing using the linear optical quantum gates. The proposed reversible NOR gates work as a corresponding NOR counterpart of NAND logic based Toffoli gates. The proposed optical reversible NOR logic gates can implement the reversible boolean logic functions with less number of linear optical quantum logic gates with reduced optical cost and propagation delay compared to the implementation using existing optical reversible NAND gates. It is illustrated that an optical reversible gate library having both optical Toffoli gate and the proposed optical reversible NOR gate is superior compared to the library containing only the optical Toffoli gate: (i) in terms of number of linear optical quantum gates when implemented using linear optical quantum computing (LOQC), (ii) in terms of optical cost and delay when implemented using the Mach-Zehnder interferometer. The third contribution of this dissertation is a binary tree-based design methodology for a NxN reversible multiplier. The proposed binary tree-based design methodology for a NxN reversible multiplier performs the addition of partial products in parallel using the reversible ripple adders with zero ancilla bit and zero garbage bit; thereby, minimizing the number of ancilla and garbage bits used in the design. The proposed design methodology shows improvements in terms of number of ancilla inputs and garbage outputs compared to all the existing reversible multiplier designs. The methodology is also extended to the design of NxN reversible signed multiplier based on modified Baugh-Wooley multiplication methodology.