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Technical digest - International Electron Devices Meeting/Technical digest

Dispersive vs charge-sensing readout for linear quantum registers

A. Aprá, Alessandro Crippa, M. L. V. Tagliaferri, J. Li, R. Ezzouch, Benoît Bertrand, Louis Hutin, N. Rambal, E. Catapano, Heimanu Niebojewski, Thomas Bédécarrats, M. Vinet, Matias Urdampilleta, Tristan Meunier, Yann‐Michel Niquet, Étienne Dumur, M. Sanquer, X. Jehl, Romain Maurand, Silvano De Franceschi

Published Dec 12, 2020• 3 citations
Publisher

Abstract

We present recent progress in the implementation of scalable schemes for spin qubit readout in one dimensional quantum registers based on fully-depleted silicon-on-insulator (FDSOI) technology. We compare two schemes both based on rf gate reflectometry. The first one, denoted as dispersive readout, minimizes the device overhead thereby facilitating scale-up to large qubit registers. The second one, denoted as charge-sensing readout, requires additional readout components but is less sensitive to the strength of the interdot coupling facilitating operation in the few-electron regime. We demonstrate single-shot charge sensing with a fidelity of 97% in 5 μs. Finally, we propose a scalable device architecture for linear qubit registers relying on charge-sensing readout.

DOI
10.1109/iedm13553.2020.9372090

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We present recent progress in the implementation of scalable schemes for spin qubit readout in one dimensional quantum registers based on fully-depleted silicon-on-insulator (FDSOI) technology. We compare two schemes both based on rf gate reflectometry. The first one, denoted as dispersive readout, minimizes the device overhead thereby facilitating scale-up to large qubit registers. The second one, denoted as charge-sensing readout, requires additional readout components but is less sensitive to the strength of the interdot coupling facilitating operation in the few-electron regime. We demonstrate single-shot charge sensing with a fidelity of 97% in 5 μs. Finally, we propose a scalable device architecture for linear qubit registers relying on charge-sensing readout.
Three key metrics for readout systems in quantum processors are measurement speed, fidelity and footprint. Fast high-fidelity readout enables mid-circuit measurements, a necessary feature for many dynamic algorithms and quantum error correction, while a small footprint facilitates the design of scalable, highly-connected architectures with the associated increase in computing performance. Here, we present two complementary demonstrations of fast high-fidelity single-shot readout of spins in silicon quantum dots using a compact, dispersive charge sensor: a radio-frequency single-electron box. The sensor, despite requiring fewer electrodes than conventional detectors, performs at the state-of-the-art achieving spin read-out fidelity of 99.2% in less than 6 μμμs. We demonstrate that low-loss high-impedance resonators, highly coupled to the sensing dot, in conjunction with Josephson parametric amplification are instrumental in achieving optimal performance. We quantify the benefit of Pauli spin blockade over spin-dependent tunneling to a reservoir, as the spin-to-charge conversion mechanism in these readout schemes. Our results place dispersive charge sensing at the forefront of readout methodologies for scalable semiconductor spin-based quantum processors.
Recent studies of silicon spin qubits at temperatures above 1 K are encouraging demonstrations that the cooling requirements for solid-state quantum computing can be considerably relaxed. However, qubit readout mechanisms that rely on charge sensing with a single-island single-electron transistor (SISET) quickly lose sensitivity due to thermal broadening of the electron distribution in the reservoirs. Here we exploit the tunneling between two quantized states in a double-island single-electron transistor (SET) to demonstrate a charge sensor with an improvement in the signal-to-noise ratio by an order of magnitude compared to a standard SISET, and a single-shot charge readout fidelity above 99% up to 8 K at a bandwidth greater than 100 kHz. These improvements are consistent with our theoretical modeling of the temperature-dependent current transport for both types of SETs. With minor additional hardware overhead, these sensors can be integrated into existing qubit architectures for a high-fidelity charge readout at few-kelvin temperatures.
Sensitive charge detection has enabled qubit readout in solid-state systems. Recently, an alternative to the well-established charge detection via on-chip electrometers has emerged, based on in situ\textit{in situ}in situ gate detectors and radio-frequency dispersive readout techniques. This approach promises to facilitate scalability by removing the need for additional device components devoted to sensing. Here, we perform gate-based dispersive readout of an accumulation-mode silicon quantum dot. We observe that the response of an accumulation-mode gate detector is significantly affected by its bias voltage, particularly if this exceeds the threshold for electron accumulation. We discuss and explain these results in light of the competing capacitive contributions to the dispersive response.
Sensitive charge detection has enabled qubit readout in solid-state systems. Recently, an alternative to the well-established charge detection via on-chip electrometers has emerged, based on in situ gate detectors and radio-frequency dispersive readout techniques. This approach promises to facilitate scalability by removing the need for additional device components devoted to sensing. Here, we perform gate-based dispersive readout of an accumulation-mode silicon quantum dot. We observe that the response of an accumulation-mode gate detector is significantly affected by its bias voltage, particularly if this exceeds the threshold for electron accumulation. We discuss and explain these results in light of the competing capacitive contributions to the dispersive response.
Quantum computers require interfaces with classical electronics for efficient qubit control, measurement and fast data processing. Fabricating the qubit and the classical control layer using the same technology is appealing because it will facilitate the integration process, improving feedback speeds and offer potential solutions to wiring and layout challenges. Integrating classical and quantum devices monolithically, using complementary metal-oxide-transistor (CMOS) processes, enables the processor to profit from the most mature industrial technology for the fabrication of large scale circuits. Here we demonstrate the integration of a single-electron charge storage CMOS quantum dot with a CMOS transistor for control of the readout via gate-based dispersive sensing using a lumped element LCLCLC resonator. The control field-effect transistor (FET) and quantum dot are fabricated on the same chip using fully-depleted silicon-on-insulator technology. We obtain a charge sensitivity of δq=165 μeHz−1/2δq=165\, μe \mathrm{Hz}^{-1/2}δq=165μeHz−1/2 when the quantum dot readout is enabled by the control FET. Additionally, we observe a single-electron retention time of the order of a second when storing a single-electron charge on the quantum dot at milli-Kelvin temperatures. These results demonstrate first steps towards time-based multiplexing of gate-based dispersive qubit readout in CMOS technology opening the path for the development of an all-silicon quantum-classical processor.
Spin qubits are an attractive platform for scalable quantum computation, and recently, laterally gated quantum dots (QDs) in Ge heterostructures have emerged as a leading implementation. Radio-frequency (RF) single-hole transistor (SHT) spin readout and integrated superconducting resonator charge readout have demonstrated in Ge QDs, but their wiring overhead and on-chip size can pose challenges, while gate dispersive (GD) readout, which requires less on-chip overhead, has yet to be demonstrated for Ge QDs. Here we demonstrate compact, low-overhead RF-GD charge readout of a Ge double QD (DQD), both directly, and assisted by a proximal single-hole box (SHB). We resolve QD loading and interdot transitions with both techniques. We obtain unity signal-to-noise ratio (SNR) in 2.7 millisecond and 135 microsecond integration time, for gate-dispersive detection of the DQD and SHB-DQD systems, respectively. We find that the SHB enhances the interdot signal-to-noise ratio (SNR) of our 540 MHz circuit by a factor of 20 for a DQD coupling tc≈5t_c \approx 5tc​≈5 GHz. Power and temperature dependent measurements verify that SNR is limited by dielectric loss. We argue that with achievable improvements in dielectric loss and amplification, high-fidelity (99\%) readout in less than 1 microsecond should be possible, assuming ideal spin-to-charge conversion, which has seen rapid recent progress. These results establish a simple and compact gate-based readout approach for direct and SHB-enhanced readout of Ge heterostructure QDs.