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arXiv:1708.04159

Conditional dispersive readout of a CMOS quantum dot via an integrated transistor circuit

Simon Schaal, Sylvain Barraud, John J. L. Morton, M. Fernando González-Zalba

Published Aug 14, 2017• 8 citations
arXivHTMLPDF

Abstract

Quantum computers require interfaces with classical electronics for efficient qubit control, measurement and fast data processing. Fabricating the qubit and the classical control layer using the same technology is appealing because it will facilitate the integration process, improving feedback speeds and offer potential solutions to wiring and layout challenges. Integrating classical and quantum devices monolithically, using complementary metal-oxide-transistor (CMOS) processes, enables the processor to profit from the most mature industrial technology for the fabrication of large scale circuits. Here we demonstrate the integration of a single-electron charge storage CMOS quantum dot with a CMOS transistor for control of the readout via gate-based dispersive sensing using a lumped element $LC$ resonator. The control field-effect transistor (FET) and quantum dot are fabricated on the same chip using fully-depleted silicon-on-insulator technology. We obtain a charge sensitivity of $δq=165\, μe \mathrm{Hz}^{-1/2}$ when the quantum dot readout is enabled by the control FET. Additionally, we observe a single-electron retention time of the order of a second when storing a single-electron charge on the quantum dot at milli-Kelvin temperatures. These results demonstrate first steps towards time-based multiplexing of gate-based dispersive qubit readout in CMOS technology opening the path for the development of an all-silicon quantum-classical processor.

DOI
10.48550/arxiv.1708.04159

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Quantum computers require interfaces with classical electronics for efficient qubit control, measurement and fast data processing. Fabricating the qubit and the classical control layer using the same technology is appealing because it will facilitate the integration process, improving feedback speeds and offer potential solutions to wiring and layout challenges. Integrating classical and quantum devices monolithically, using complementary metal-oxide-transistor (CMOS) processes, enables the processor to profit from the most mature industrial technology for the fabrication of large scale circuits. Here we demonstrate the integration of a single-electron charge storage CMOS quantum dot with a CMOS transistor for control of the readout via gate-based dispersive sensing using a lumped element LCLCLC resonator. The control field-effect transistor (FET) and quantum dot are fabricated on the same chip using fully-depleted silicon-on-insulator technology. We obtain a charge sensitivity of δq=165 μeHz−1/2δq=165\, μe \mathrm{Hz}^{-1/2}δq=165μeHz−1/2 when the quantum dot readout is enabled by the control FET. Additionally, we observe a single-electron retention time of the order of a second when storing a single-electron charge on the quantum dot at milli-Kelvin temperatures. These results demonstrate first steps towards time-based multiplexing of gate-based dispersive qubit readout in CMOS technology opening the path for the development of an all-silicon quantum-classical processor.
Solid-state quantum computers require classical electronics to control and readout individual qubits and to enable fast classical data processing [1-3]. Integrating both subsystems at deep cryogenic temperatures [4], where solid-state quantum processors operate best, may solve some major scaling challenges, such as system size and input/output (I/O) data management [5]. Spin qubits in silicon quantum dots (QDs) could be monolithically integrated with complementary metal-oxide-semiconductor (CMOS) electronics using very-large-scale integration (VLSI) and thus leveraging over wide manufacturing experience in the semiconductor industry [6]. However, experimental demonstrations of integration using industrial CMOS at mK temperatures are still in their infancy. Here we present a cryogenic integrated circuit (IC) fabricated using industrial CMOS technology that hosts three key ingredients of a silicon-based quantum processor: QD arrays (arranged here in a non-interacting 3x3 configuration), digital electronics to minimize control lines using row-column addressing and analog LC resonators for multiplexed readout, all operating at 50 mK. With the microwave resonators (6-8 GHz range), we show dispersive readout of the charge state of the QDs and perform combined time- and frequency-domain multiplexing, enabling scalable readout while reducing the overall chip footprint. This modular architecture probes the limits towards the realization of a large-scale silicon quantum computer integrating quantum and classical electronics using industrial CMOS technology.
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As quantum processors become more complex, they will require efficient interfaces to deliver signals for control and readout while keeping the number of inputs manageable. Complementary metal–oxide–semiconductor (CMOS) electronics offers established solutions to signal routing and dynamic access, and the use of a CMOS platform for the qubits themselves offers the attractive proposition of integrating classical and quantum devices on-chip. Here, we report a CMOS dynamic random access architecture for readout of multiple quantum devices operating at millikelvin temperatures. Our circuit is divided into cells, each containing a control field-effect transistor and a quantum dot device, formed in the channel of a nanowire transistor. This set-up allows selective readout of the quantum dot and charge storage on the quantum dot gate, similar to one-transistor–one-capacitor (1T-1C) dynamic random access technology. We demonstrate dynamic readout of two cells by interfacing them with a single radio-frequency resonator. Our approach provides a path to reduce the number of input lines per qubit and allow large-scale device arrays to be addressed.
Abstract Recent advances in quantum error correction codes for fault-tolerant quantum computing and physical realizations of high-fidelity qubits in multiple platforms give promise for the construction of a quantum computer based on millions of interacting qubits. However, the classical-quantum interface remains a nascent field of exploration. Here, we propose an architecture for a silicon-based quantum computer processor based on complementary metal-oxide-semiconductor (CMOS) technology. We show how a transistor-based control circuit together with charge-storage electrodes can be used to operate a dense and scalable two-dimensional qubit system. The qubits are defined by the spin state of a single electron confined in quantum dots, coupled via exchange interactions, controlled using a microwave cavity, and measured via gate-based dispersive readout. We implement a spin qubit surface code, showing the prospects for universal quantum computation. We discuss the challenges and focus areas that need to be addressed, providing a path for large-scale quantum computing.
Abstract The most promising quantum algorithms require quantum processors that host millions of quantum bits when targeting practical applications1. A key challenge towards large-scale quantum computation is the interconnect complexity. In current solid-state qubit implementations, an important interconnect bottleneck appears between the quantum chip in a dilution refrigerator and the room-temperature electronics. Advanced lithography supports the fabrication of both control electronics and qubits in silicon using technology compatible with complementary metal oxide semiconductors (CMOS)2. When the electronics are designed to operate at cryogenic temperatures, they can ultimately be integrated with the qubits on the same die or package, overcoming the ‘wiring bottleneck’3–6. Here we report a cryogenic CMOS control chip operating at 3 kelvin, which outputs tailored microwave bursts to drive silicon quantum bits cooled to 20 millikelvin. We first benchmark the control chip and find an electrical performance consistent with qubit operations of 99.99 per cent fidelity, assuming ideal qubits. Next, we use it to coherently control actual qubits encoded in the spin of single electrons confined in silicon quantum dots7–9 and find that the cryogenic control chip achieves the same fidelity as commercial instruments at room temperature. Furthermore, we demonstrate the capabilities of the control chip by programming a number of benchmarking protocols, as well as the Deutsch–Josza algorithm10, on a two-qubit quantum processor. These results open up the way towards a fully integrated, scalable silicon-based quantum computer.