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Bulletin of the American Physical Society

Scalable architecture for next generation superconducting quantum processors

Joseph Suttle, Neereja Sundaresan, Srikanth J. Srinivasan, Joseph D. Sirianni, Gloria Fraczak, April Carniol, Will Shanks, Eric P. Lewandowski, John M. Cotte, Jae-Woong Nah, Muir Kumph, Ricardo A. Donaton, David W. Abraham

Published Mar 15, 2021• 0 citations
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Scalable, high-fidelity quantum-state readout remains a central challenge in the development of large-scale superconducting quantum processors. Conventional dispersive readout architectures depend on bulky isolators and external amplifiers, introducing significant hardware overhead and limiting opportunities for on-chip information processing. In this work, we propose a novel approach that embeds a nonlinear Superconducting Nonlinear Asymmetric Inductive eLement (SNAIL) into the readout chain, enabling coherent and directional processing of readout signals directly on-chip. This embedded SNAIL platform allows frequency-multiplexed resonators to interact through engineered couplings, forming a tunable readout-amplifier-output architecture that can manipulate quantum readout data \textit{in situ}. Through theoretical modeling and numerical optimization, we show that this platform enhances fidelity, suppresses measurement-induced decoherence, and simplifies hardware complexity. These results establish the hybridized SNAIL as a promising building block for scalable and coherent quantum-state readout in next-generation processors.