Quantum computing is the most advanced form of computing that is evolving today. Classical computers work on binary bits - 0 or 1, but quantum computers work on quantum bits or qubits which can be in the state 0 and 1 simultaneously and exhibit properties like superposition and entanglement. This paper proposes the implementation of a full adder with the concepts of quantum computing using quantum gates on IBM composer. IBM composer is the choice of tool for this paper, and the resultant speed of operation is calculated to be 6.064ms for 1024 shots (1 shot is 100 repetitions). By designing a full adder in this paper, it is contemplated that more complicated digital circuitry will be implemented on quantum computers in near future, thus paving the way for bringing high speed quantum computing in our daily lives to solve critical problems that are unresolvable by conventional computing.
Quantum computing is the most advanced form of computing that is evolving today. Classical computers work on binary bits - 0 or 1, but quantum computers work on quantum bits or qubits which can be in the state 0 and 1 simultaneously and exhibit properties like superposition and entanglement. This paper proposes the implementation of a full adder with the concepts of quantum computing using quantum gates on IBM composer. IBM composer is the choice of tool for this paper, and the resultant speed of operation is calculated to be 6.064ms for 1024 shots (1 shot is 100 repetitions). By designing a full adder in this paper, it is contemplated that more complicated digital circuitry will be implemented on quantum computers in near future, thus paving the way for bringing high speed quantum computing in our daily lives to solve critical problems that are unresolvable by conventional computing.
Recent advancements in computing speed and capacity of Artificial Intelligence (AI) algorithms have reached a saturation level in performance due to the continuous application of Moore's law which resulted in the memory wall phenomenon. Quantum computing (QC), based on the principles of quantum mechanics which include superposition and entanglement, has the potential to contribute to the advancements of AI by providing exponential speedup. Quantum computers use quantum bits, also known as qubits, as the metric to demonstrate the power of quantum technology. Qubits, the fundamental unit of quantum information can exist in two states, 0 and 1, simultaneously, leveraging the principle of superposition. Quantum gates are the building blocks of quantum circuits, operating on qubits to transform one quantum state into another, and are comparative to classical logic gates. Designing and simulating quantum circuits can be completed using the Qiskit library design by IBM. Qiskit is a cloud-based, open access platform to real quantum computers with 5 to 16 qubits. This paper offers a straightforward tutorial on implementing one, two and three-qubit quantum gates, as well as designing quantum circuits using the Qiskit library, illustrated with an example of a quantum half adder implementation.
Quantum computing has gained a lot of interest recently because of its claims of solving some problems that are almost impossible solving in classical computing.Prime factorization of big numbers using Shor's algorithm and Grover database search algorithm are two of them.Furthermore, quantum algorithms are developed to make it more realistic in real world.In classical computing the basic unit of computation is a bit which is in 0 or 1 state at a time, whereas in quantum computing it is called a qbit which can be 0 and 1 at the same time and we call it superposition.This paper proposes an implementation of quantum full adder using IBM quantum experience.Quantum circuits are drawn using Qiskit and run on Qiskit simulators, IBM quantum simulators and real IBM quantum machines.Proposed circuit will help in future for drawing more complex circuits and algorithms.
In this paper, an n-bit Quantum Binary Adder-Subtractor (QBAS) is designed using quantum logic gates using IBM Qiskit. A comprehensive understanding of the principles of quantum computing and quantum logic gates is also provided. As the fundamental module of a binary adder-subtractor circuit is a full adder, various designs of quantum full adders (QFAs) from the literature are investigated on various aspects to deliberately choose the best quantum full adder suitable for QBAS application. A QBAS circuit is thus designed using the selected QFA, analyzed and tested for its ability to replicate the output of its classical counterpart. The results obtained here will aid researchers in the design of Quantum Arithmetic Logic Units (QALUs), Quantum multipliers, dividers, and other scalable adder circuits. The proposed circuits and its results shown here expected to pave the way for design of compact and state of the art quantum adders with reduced number of qubits, quantum cost.
Abstract Reversible gates have been one of the emerging research areas in these days. The reversible gates have several applications in the fields of low power CMOS, DNA computing, optical, nanotechnology etc. Quantum computing is one of the fastest and upcoming nanotechnologies that can implement the digital logical circuits using reversible logic gates. In this paper, CNOT, TOFFOLI, FREDKIN and PERES reversible logic gates have been implemented on IBM quantum computer. An efficient one-bit full adder is going to be proposed using the reversible gates like CNOT and TOFFOLI. Later, a 4x4 multiplier will be developed using the proposed one-bit full adder. The proposed multiplier is proved to perform faster calculations compared to the earlier multipliers. The simulation of the presented modules will be done on IBM Quantum computer and the respective probabilities can be observed for different inputs.
Quantum computing (Q-computing) is a revolutionary technology that applies quantum mechanics (QM) to implement calculations significantly quicker than traditional computers. Q-computing employs Q-bits (qubits) rather than classical bits, which can take on a superposition state, making it possible to represent both 0 and 1 at once. This distinctive property allows qubits to perform multiple calculations simultaneously, making Q computers exponentially more powerful as more qubits are added, compared to the linear scaling of classical computers. However, challenges such as qubit instability and error rates remain significant obstacles to fully realizing this potential. A vital aspect of this technology is the development of Q arithmetic circuits, which act as the foundational blocks for efficiently executing Q algorithms. Q half-adder and full-adder circuits are integral to performing fundamental arithmetic operations within Q computers. In contrast to classical adders, Q adders rely on Q gates such as Controlled NOT (CNOT) and Toffoli gates. These gates exploit Q phenomena like entanglement and superposition, allowing for more efficient computations. The Q half-adder consists of two qubits and adds two single bits, producing a carry and sum output. It utilizes the CNOT gate to compute the sum and the Toffoli gate (controlled-controlled-NOT [CCNOT]) to compute the carry. The Q full-adder builds on this, adding three qubits to produce a sum and a carry output, further increasing computational capacity. Through the entanglement of qubits, these circuits allow for more parallelism and speed compared to classical adders. Q carry-look-ahead adders (QCLAs) and Q ripple-carry adders (QRCAs) are used to perform more complex arithmetic operations based on these half-adder and full-adder structures. Q arithmetic circuits have broad applications, boosting secure key generation in cryptography, speeding up matrix operations for faster model training in machine learning, and enabling more precise, efficient image transformations in Q image processing, benefiting fields like medical imaging and computer vision.
The quantum adder is an essential attribute of a quantum computer, just as classical adder is needed for operation of a digital computer. We model the quantum full adder as a realistic complex algorithm on a large number of qubits in an Ising spin quantum computer. Our results are an important step toward effective modeling of the quantum modular adder which is needed for Shor's and other quantum algorithms. Our full adder has the following features. (i) The near-resonant transitions with small detunings are completely suppressed, which allows us to decrease errors by several orders of magnitude and to model a 1000-qubit full adder. (We add a 1000-bit number using 2001 spins.) (ii) We construct the full adder gates directly as sequences of radio-frequency pulses, rather than breaking them down into generalized logical gates, such as Control-Not and one qubit gates. This substantially reduces the number of pulses needed to implement the full adder. (The maximum number of pulses required to add one bit (F-gate) is 15.) (iii) Full adder is realized in a homogeneous spin chain. (iv) The phase error is minimized: the F-gates generate approximately the same phase for different states of the superposition. (v) Modeling of the full adder is performed using quantum maps instead of differential equations. This allows us to reduce the calculation time to a reasonable value.