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IEEE International Conference on Consumer Electronics - Taiwan (ICCE-Taiwan)

Improved Normalized Probabilistic Minimum Summation Algorithm for LDPC Decoding

Chenxuan Wang, Cheng-Hung Dixson Lin

Published Sep 28, 2020• 2 citations
Publisher

Abstract

The hardware design of the probabilistic min-sum algorithm can be efficiently realized by group searching. Although it can accelerate calculation and reduce hardware complexity, it degrades error correction capability. Thus, an improved method for simplified min-sum algorithm is proposed in this paper. In order to recover the error correction capability, we apply the accurate first minimum for adjusting the reliability of the probabilistic second minimum. Maintaining the value of the first minimum and proportionally combining the first two minima can flexibly improve the reliability of probabilistic second minimum. Compared with the original simplified min-sum algorithm, the improved method not only gains the efficient hardware design but also obtains the better error correction capability.

DOI
10.1109/icce-taiwan49838.2020.9258198

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The hardware design of the probabilistic min-sum algorithm can be efficiently realized by group searching. Although it can accelerate calculation and reduce hardware complexity, it degrades error correction capability. Thus, an improved method for simplified min-sum algorithm is proposed in this paper. In order to recover the error correction capability, we apply the accurate first minimum for adjusting the reliability of the probabilistic second minimum. Maintaining the value of the first minimum and proportionally combining the first two minima can flexibly improve the reliability of probabilistic second minimum. Compared with the original simplified min-sum algorithm, the improved method not only gains the efficient hardware design but also obtains the better error correction capability.
In order to simplify the check node operation of the low-density parity-check (LDPC) decoders, this paper presents a Normalized Probabilistic Min-Sum Algorithm (NPMSA), where the second minimum value is replaced by a probabilistic second minimum value. For NPMSA, the number of required comparisons can be reduced to about half compared to that of the conventional Normalized Min-Sum Algorithm (NMSA). It is shown that the simplification only introduces negligible impact on the bit-error rate performance, especially for codes with a high check node degree. When the proposed NPMSA is applied to the (2048, 1723) RS-LDPC code, the degradation in the error-rate performance is only about 0.05 dB. The hardware implementation shows that a throughput of 45.42 Gbps can be achieved using the proposed NPMSA.
This paper proposes a low-complexity min-sum algorithm for decoding low-density parity-check codes. It is an improved version of the single-minimum algorithm where the two-minimum calculation is replaced by one minimum calculation and a second minimum emulation. In the proposed one, variable correction factors that depend on the iteration number are introduced and the second minimum emulation is simplified, reducing by this way the decoder complexity. This proposal improves the performance of the single-minimum algorithm, approaching to the normalized min-sum performance in the water-fall region. Also, the error-floor region is analyzed for the code of the IEEE 802.3an standard showing that the trapping sets are decoded due to a slow down of the convergence of the algorithm. An error-floor free operation below BER=10-15is shown for this code by means of a field-programmable gate array (FPGA)-based hardware emulator. A layered decoder is implemented in a 90-nm CMOS technology achieving 12.8 Gbps with an area of 3.84 mm2.
Low-Density Parity check (LDPC) codes offer high-performance error correction near the Shannon limit which employs large code lengths and some iterations in the decoding process. The conventional decoding algorithm of LDPC is the Log Likelihood Ratio based Belief Propagation (LLR BP) which is also known as the `Sum-Product algorithm' which gives the best decoding performance and requires the most computational complexity and implementations with increased hardware complexity. Another simpler variant of this algorithm is used which is known as `min-sum algorithm' which reduces computational complexity as well as hardware complexity but with reduced accuracy. This paper analyzes the reason min-sum algorithm is more prone to errors when compared to the sum-product algorithm, and puts forward two improved algorithms which improve the performance of the min-sum algorithm with comparable algorithmic complexity.
A modified self-corrected min-sum LDPC decoding is proposed in this paper. The proposed method introduces parameters to improve BER performance and few modifications to reduce the iteration number. The simulation results show that the proposed method can achieve at most 93.6% improvement of BER compare with the original self-corrected min-sum decoding algorithm and 99% improvement compare with the min-sum decoding algorithm. The iteration number can be reduced by up to 102.6% compare with the min-sum decoding algorithm and 67.5% compare with the original self-corrected min-sum decoding algorithm. The proposed method has advantages in both BER and hardware implementation, which suits for different working environments.
In this paper, we present an improvement on the normalized min-sum (NMS) decoding algorithm for low density parity check codes. The modified NMS (M-NMS) algorithm introduces a more efficient adjustment for check node update computation. Taking the sub-minimum value among extrinsic information from the variable nodes into consideration, we make the correction factor varies with different iterations. Results show that, compared with standard min-sum (MS) and NMS decoding algorithms, the proposed method not only offers a better performance but also achieves a lower error floor in the high SNR region.
In this paper a modified Offset Min-Sum decoding algorithm for Low-Density Parity Check Codes is presented. In this modified algorithm, the offset factor in the original Offset Min-Sum algorithm is adjusted iteratively with the assistance of the check-node computation outputs of the Normalized Min-Sum algorithm. As a result, the offset factor in our modified algorithm can be calculated adaptively and more efficiently according to the previous decoding procedure, which can minimize the decoding degradation compared with the Belief Propagation decoding algorithm. The simulation results show that, compared with the original Offset Min-Sum decoding algorithm, our modified algorithm can achieve noticeable performance improvement with minor extra hardware complexity. For example, when BER is 10−5, our algorithm can achieve 0.1dB and 0.2dB decoding gain over Offset Min-Sum algorithm for regular and irregular LDPC codes respectively.