Quantum computation has taken over as one of the largest current research areas in computer architecture and information theory. With the potential to make a large number of factorization-based encryption methods obsolete, companies and governments around the globe are racing to build the first large-scale quantum computer. Currently, most quantum computers are noisy intermediate-scale quantum (NISQ), using a relatively small collection of unreliable qubits. While error correction methods exist, they require a large number of ancilla qubits to protect the data qubits which is not practical for use on current NISQ machines. However, following the Dowling-Neven Law, available qubits on a superconducting chip are growing at an exponential rate similar to Moore's Law. Looking toward larger scale quantum machines, we examine a method to increase usable qubit density of quantum machines implementing error correction by using quantum caches that utilize simpler error correction codes. Alternatively, this also allows for the design of reliable systems while meeting the performance and qubit requirements for quantum algorithms. We modify the Qiskit quantum simulation library to work with caches and investigate the effects of region size and topology on the swap characteristics of algorithm execution. We also present our results and discuss recommended topologies for each algorithm. Lastly, we present mix scale-out simulations to examine the impact of cache on future large-scale machines. The default central cache topology gains a maximum performance increase of 2.15 times compared to the worst topology, which creates a robust cache-aware quantum processor layout.
Quantum computation has taken over as one of the largest current research areas in computer architecture and information theory. With the potential to make a large number of factorization-based encryption methods obsolete, companies and governments around the globe are racing to build the first large-scale quantum computer. Currently, most quantum computers are noisy intermediate-scale quantum (NISQ), using a relatively small collection of unreliable qubits. While error correction methods exist, they require a large number of ancilla qubits to protect the data qubits which is not practical for use on current NISQ machines. However, following the Dowling-Neven Law, available qubits on a superconducting chip are growing at an exponential rate similar to Moore's Law. Looking toward larger scale quantum machines, we examine a method to increase usable qubit density of quantum machines implementing error correction by using quantum caches that utilize simpler error correction codes. Alternatively, this also allows for the design of reliable systems while meeting the performance and qubit requirements for quantum algorithms. We modify the Qiskit quantum simulation library to work with caches and investigate the effects of region size and topology on the swap characteristics of algorithm execution. We also present our results and discuss recommended topologies for each algorithm. Lastly, we present mix scale-out simulations to examine the impact of cache on future large-scale machines. The default central cache topology gains a maximum performance increase of 2.15 times compared to the worst topology, which creates a robust cache-aware quantum processor layout.
Quantum computing has the potential to solve complex problems that are outside the scope of classical systems, making it a standard shifter. Current devices, which are considered as Noisy Intermediate-Scale Quantum (NISQ) systems, are insufficient in their practical utility due to hardware limitations, error rates, and qubit counts. The dynamic growths wanted to exceed the NISQ era and grow scalable quantum algorithms and architectures that can achieve useful quantum benefit in real-world applications are reviewed in this research. This research gives a comprehensive examination of the complications in scaling quantum systems, adjacent resource efficacy, qubit connectivity, and error correction. In addition to connecting architectural innovations like modular quantum computing, error-resilient circuit design, and distributed quantum systems, the paper provides new hybrid quantum-classical algorithms planned to exploit performance in noisy environments. Results from benchmarking in arenas like machine learning, optimization, and quantum chemistry show how these methods can provide short-term quantum benefit. Lastly, this paper proposes a research roadmap for quantum computing that highlights the requirement of co-designing algorithms, software, and hardware. The goal of this effort is to straighten the progress of quantum systems that can resolve problems in the real world at scale by addressing the inadequacies of NISQ devices and emphasizing scalable solutions.
One of the main drivers for growing the field of quantum computation has been the prospect of creating a quantum computer capable of carrying out Shor's algorithm for huge numbers.Nonetheless, it is critical to recognise that quantum computers will probably only significantly speed up a small subset of issues if one wants to acquire a more comprehensive perspective on them.Building a system that can accommodate a lot of qubits while preserving stability and coherence is one of the biggest problems in quantum computing.Due to their extreme sensitivity to noise and mistakes, quantum systems are particularly susceptible to computing errors.Building a usable quantum computer requires error mitigation and correction, but the techniques for doing this are still in the early phases of research.In quantum computing, all processes and schemes must be reversible in accordance with the law of unitary development.The circuit model is taken into account in the NISQ framework, but there is also the one-way or measurement-based quantum computation approach, which is not reversible but is demonstrated to be comparable to the circuit model.Noisy suggests that the computing capacity of such quantum computers is constrained because of sufficiently high error and decoherence rates.While they are likely too huge to be replicated by traditional computers using brute force, Intermediate-Scale suggests that they are still too small to be mistake corrected, which also adds to the preceding argument about how noisy they are.P stands for the usage of perfect qubits with perfect quantum gates and no decoherence.The capability to control and protect our qubits in a quantum computer to the degree necessary to run such algorithms is commonly described as fault-tolerant quantum computation.This review paper examines the numerous quantum computing strategies, such as Noisy Intermediate Scale Computing (NISQ) , Perfect Intermediate Scale Computing (PISQ), and Fault Tolerant Intermediate Scale Computing (FTISQ), as well as potential future lines of inquiry.
The transition from noisy intermediate-scale quantum (NISQ) processors to large-scale fault-tolerant machines requires more than incremental improvements in physical qubit fidelity. While advances in quantum error correction (QEC) theory continue to lower the theoretical overhead of quantum computing, much of this research remains abstracted from the physical realities of qubit implementations. This disconnect often results in hardware-agnostic designs that are inefficient or impractical to build. In this dissertation, I identify three primary gaps between theoretical QEC research and practical hardware: (1) the high levels of noise and temporal instability in experimental devices that impede scalable QEC; (2) the prohibitively large qubit and time costs of useful algorithms, driven largely by the limitations of the standard surface code; and (3) the failure of current resource estimates to account for hardware-level constraints, such as limited connectivity and the complexity of implementing non-local operations. To bridge these gaps, I propose a holistic, cross-stack approach where the error correction protocols and the physical hardware are designed in concert. By developing realistic device models and hardware-aware solutions at the lowest levels of the software stack, we can accelerate the path toward functional fault-tolerance. I present my work across three research thrusts: first, leveraging codesign to mitigate hardware-specific noise and reduce physical error rates; second, developing software tools for fault-tolerant quantum computers to reduce the space-time overhead of the QEC layer; and third, proposing two novel hardware-aware QEC architectures that provide practical, high-performance routes to scalable quantum computation.
Quantum computing is entering a transitional regime between noisy intermediate-scale quantum (NISQ) processing and early fault-tolerant quantum computation (FTQC), in which increasingly capable hardware is beginning to support repeated syndrome measurements, partial error correction, and logical-qubit operations, while residual physical and logical errors remain non-negligible. In this regime, error suppression, error mitigation, and quantum error correction are increasingly better viewed as complementary layers of a unified error-reduction strategy rather than as separate approaches, with each acting at a different stage of the quantum computation to improve simulation reliability. Thus, in this review, we provide a practical and forward-looking overview of the principal hardware error sources and the corresponding error suppression and mitigation methods for reducing their impact across the current NISQ-FTQC transition. We discuss hardware-aware circuit design, coherent-error suppression, readout mitigation, noise extrapolation, classical inference, and software-supported workflows, with particular emphasis on their implementation on actual quantum processors. We further examine how error mitigation techniques can be adapted to encoded and logical-qubit settings so that they can operate alongside quantum error correction to suppress residual logical errors and improve the accuracy of computation in the early fault-tolerant regime.
As the complexity of quantum computers increases, typical architectural issues such as communication, layout, and efficient design need to be addressed. This document addresses some basic architectural ideas for quantum computers.
To be useful in reasonable calculations, quantum states will need constant error correction. This need guides how best to lay out physical components to minimize error-correction overhead. I propose a layout that minimizes communication overhead, and discuss the implementation of error-correction algorithms on that layout. I compare the cost overhead of purely local communication to communication by teleportation, and calculate the break-even point at which teleportation becomes efficient.
Additionally, the overhead of error correction can be reduced by using a memory hierarchy to more efficiently store data not currently being computed on. The main requirement is the same as for a classical computer's cache: temporal locality. I show that an important quantum routine can be rearranged to take advantage of a small quantum memory cache, and compute the achieved savings.
In a quantum system, complex operators are built up from the basic operators allowed by a given technology model. I show that the set of operators required to implement any complex operator in an error-corrected system can be approximated to arbitrary precision, given two elementary operators. I give results for all the operators in the set.
Finally, I examine methods to initialize a quantum system. Quantum operators are reversible, so data cannot simply be written over. Instead, initialization entails compressing the entropy of a set of quantum bits into a small subset of those bits, leaving the rest of the bits in a known, non-random state. I examine three such compression algorithms. The best of these itself requires a pool of known states, and so cannot be used directly. The other two algorithms, however, produce less-than-optimal results. I explore why they produce suboptimal results, and propose that one of the suboptimal algorithms be used to compress the entropy of a subsystem, using the resulting known state to run the optimal algorithm.
Quantum computing has emerged as a transformative paradigm capable of addressing computational challenges beyond the reach of classical systems.In the current era of Noisy Intermediate-Scale Quantum (NISQ) devices, practical quantum hardware is characterized by limited qubit counts, short coherence times, gate errors, and the absence of full error correction.Despite these constraints, significant progress has been made in developing quantum machine learning (QML) techniques tailored to operate on near-term quantum processors.This paper presents a comprehensive review of Quantum Machine Learning in the context of NISQ computing.We first outline the fundamental principles of quantum computing, including qubits, superposition, entanglement, and quantum parallelism, followed by a detailed discussion of the NISQ computing model and its hardware limitations.The review then examines hybrid quantum-classical learning frameworks, variational quantum algorithms, quantum data encoding strategies, and noise mitigation techniques that enable practical implementation on existing platforms.Emerging applications across healthcare, finance, cybersecurity, climate modeling, and materials science are also surveyed to highlight the real-world potential of QML.Furthermore, key challenges such as scalability, trainability issues, and algorithmic robustness are analyzed, along with current research efforts aimed at overcoming these barriers.The paper concludes by identifying promising future directions for advancing QML toward quantum advantage.This review aims to provide researchers and practitioners with a structured understanding of the capabilities, limitations, and opportunities of quantum machine learning in the NISQ era .