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QuMAsim: A Quantum Architecture Simulation and Verification Platform

Mengyu Zhang

Published Jan 1, 2018• 2 citations
OpenAlex

Abstract

Quantum microarchitecture is a key component in bridging the gap between quantum software and quantum hardware of a fully programmable quantum computer. Confronting the control problem of superconducting quantum processors, an experimental microarchitecture (QuMA) has been proposed in previous work. As the size of the target quantum chip continues to evolve, the complexity of QuMA scales up accordingly. This increase in complexity has led to a growing challenge in QuMA’s design, development, and verification. To solve these problems, we build a QuMA simulator which can automate the current QuMA verification process and accelerate the design phase of QuMA. We called this simulator QuMAsim. The first version of QuMAsim is based on CC-Light, an instance of QuMA for controlling a surface-7 superconducting qubit chip. Then this simulator is extended to be self-configurable for different quantum chips. Several applications are built based on this simulator. The verification platform consists of the simulator, the VHDL implementation of QuMA and a validator is designed to automate the verification procedure. In addition, we built a quantum virtual machine based on QuMAsim, which includes other quantum software and simulators to simulate the execution of quantum algorithms on each layer of the quantum computer. We demonstrate the potential of QuMAsim by performing some experiments with it and its applications, including the gearbox circuit simulation.

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Quantum microarchitecture is a key component in bridging the gap between quantum software and quantum hardware of a fully programmable quantum computer. Confronting the control problem of superconducting quantum processors, an experimental microarchitecture (QuMA) has been proposed in previous work. As the size of the target quantum chip continues to evolve, the complexity of QuMA scales up accordingly. This increase in complexity has led to a growing challenge in QuMA’s design, development, and verification. To solve these problems, we build a QuMA simulator which can automate the current QuMA verification process and accelerate the design phase of QuMA. We called this simulator QuMAsim. The first version of QuMAsim is based on CC-Light, an instance of QuMA for controlling a surface-7 superconducting qubit chip. Then this simulator is extended to be self-configurable for different quantum chips. Several applications are built based on this simulator. The verification platform consists of the simulator, the VHDL implementation of QuMA and a validator is designed to automate the verification procedure. In addition, we built a quantum virtual machine based on QuMAsim, which includes other quantum software and simulators to simulate the execution of quantum algorithms on each layer of the quantum computer. We demonstrate the potential of QuMAsim by performing some experiments with it and its applications, including the gearbox circuit simulation.
Quantum computers can accelerate solving some problems which are inefficiently solved by classical computers, such as quantum chemistry simulation. To date, quantum computer engineering has focused primarily at opposite ends of the required system stack: devising high-level programming languages and compilers to describe and optimize quantum algorithms, and building reliable low-level quantum hardware. Relatively little attention has been given to using the compiler output to fully control the operations on current experimental quantum processors. Bridging this gap, we propose and build a prototype of flexible control microarchitecture, named QuMA, supporting quantum-classical mixed code for a superconducting quantum processor. The microarchitecture is based on three core elements: (i) a codeword-based event control scheme, (ii) queue-based precise event timing control, and (iii) a flexible multilevel instruction decoding mechanism for control.
This article presents the definition and implementation of a quantum computer architecture to enable creating a new computational device-a quantum computer as an accelerator. A key question addressed is what such a quantum computer is and how it relates to the classical processor that controls the entire execution process. In this article, we present explicitly the idea of a quantum accelerator that contains the full stack of the layers of an accelerator. Such a stack starts at the highest level describing the target application of the accelerator. The next layer abstracts the quantum logic outlining the algorithm that is to be executed on the quantum accelerator. In our case, the logic is expressed in the universal quantum-classical hybrid computation language developed in the group, called OpenQL, which visualized the quantum processor as a computational accelerator. The OpenQL compiler translates the program to a common assembly language, called cQASM, which can be executed on a quantum simulator. The cQASM represents the instruction set that can be executed by the microarchitecture implemented in the quantum accelerator. In a subsequent step, the compiler can convert the cQASM to generate the eQASM, which is executable on a particular experimental device incorporating the platform-specific parameters. This way, we are able to distinguish clearly the experimental research toward better qubits, and the industrial and societal applications that need to be developed and executed on a quantum device. The first case offers experimental physicists with a full-stack experimental platform using realistic qubits with decoherence and error-rates, whereas the second case offers perfect qubits to the quantum application developer, where there is neither decoherence nor error-rates. We conclude the article by explicitly presenting three examples of full-stack quantum accelerators, for an experimental superconducting processor, for quantum accelerated genome sequencing and for near-term generic optimization problems based on quantum heuristic approaches. The two later full-stack models are currently being actively researched in our group.
A widely-used quantum programming paradigm comprises of both the data How and control How. Existing quantum hardware cannot well support the control How, significantly limiting the range of quantum software executable on the hardware. By analyzing the constraints in the control microarchitecture, we found that existing quantum assembly languages are either too high-level or too restricted to support comprehensive How control on the hardware. Also, as observed with the quantum microinstruction set QuMIS [1], the quantum instruction set architecture (QISA) design may suffer from limited scalability and Hexibility because of microarchitectural constraints. It is an open challenge to design a scalable and Hexible QISA which provides a comprehensive abstraction of the quantum hardware. In this paper, we propose an executable QISA, called eQASM, that can be translated from quantum assembly language (QASM), supports comprehensive quantum program How control, and is executed on a quantum control microarchitecture. With efficient timing specification, single-operation-multiple-qubit execution, and a very-long-instruction-word architecture, eQASM presents better scalability than QuMIS. The definition of eQASM focuses on the assembly level to be expressive. Quantum operations are configured at compile time instead of being defined at QISA design time. We instantiate eQASM into a 32-bit instruction set targeting a seven-qubit superconducting quantum processor. We validate our design by performing several experiments on a two-qubit quantum processor.
Quantum computers promise to solve certain problems that are intractable for classical computers, such as factoring large numbers and simulating quantum systems. To date, research in quantum computer engineering has focused primarily at opposite ends of the required system stack: devising high-level programming languages and compilers to describe and optimize quantum algorithms, and building reliable low-level quantum hardware. Relatively little attention has been given to using the compiler output to fully control the operations on experimental quantum processors. Bridging this gap, we propose and build a prototype of a flexible control microarchitecture supporting quantum-classical mixed code for a superconducting quantum processor. The microarchitecture is based on three core elements: (i) a codeword-based event control scheme, (ii) queue-based precise event timing control, and (iii) a flexible multilevel instruction decoding mechanism for control. We design a set of quantum microinstructions that allows flexible control of quantum operations with precise timing. We demonstrate the microarchitecture and microinstruction set by performing a standard gate-characterization experiment on a transmon qubit.
Quantum computing is transitioning from laboratory research to industrial deployment, yet significant challenges persist: system scalability and performance, fabrication yields, and the advancement of algorithms and applications. We emphasize that in building quantum computers -- spanning quantum chips, system integration, instruction sets, algorithms, and middleware such as quantum error correction schemes -- design is everywhere. In this paper, we advocate for a holistic design perspective in quantum computing, a perspective we argue is pivotal to unlocking innovative co-design opportunities and addressing the aforementioned key challenges. To equip readers with sufficient background for exploring co-optimization opportunities, we detail how interconnected computational methods and tools collaborate to enable end-to-end quantum computer design. This coverage encompasses critical stages -- such as chip layout design automation, high-fidelity system-level simulation, Hamiltonian derivation for quantum system modeling, control pulse simulation, decoherence analysis, and physical verification and testing -- followed by quantum instruction set design. We then proceed to quantum system and software development, including quantum circuit synthesis, quantum error correction and fault tolerance, and logic verification and testing. Through these discussions, we illustrate with concrete examples -- including co-optimizing quantum instruction sets with algorithmic considerations, customizing error correction circuits to hardware-specific constraints, and streamlining quantum chip design through tailored code design, among others. We hope that the detailed end-to-end design workflow as well as these examples will foster dialogue between the hardware and software communities, ultimately facilitating the translation of meaningful research findings into future quantum hardware implementations.