Atom qubits in silicon provide a promising platform for realising a scalable quantum computer. In article number 2003361, Michelle Simmons and co-workers present a qubit environment with a notably low level of charge noise achieved by hosting phosphorus atoms in an all-crystalline silicon substrate well-separated from surface and interface states. The level of charge noise experienced by the phosphorus atoms is sufficiently low to enable two-qubit gate fidelities above 99.99%, well within the 99% threshold required for error-correction.
Atom qubits in silicon provide a promising platform for realising a scalable quantum computer. In article number 2003361, Michelle Simmons and co-workers present a qubit environment with a notably low level of charge noise achieved by hosting phosphorus atoms in an all-crystalline silicon substrate well-separated from surface and interface states. The level of charge noise experienced by the phosphorus atoms is sufficiently low to enable two-qubit gate fidelities above 99.99%, well within the 99% threshold required for error-correction.
Logical qubits are essential for utility scale universal quantum computation and require stable, high-fidelity physical qubits. In this thesis we consider three factors that can affect the performance of phosphorus atom qubits in silicon. Specifically, we determined the number of phosphorus atoms in few-atom qubit registers using the charging energy. We then explored if a new silicon encapsulation recipe could reduce charge noise under realistic qubit operating conditions. Finally, we performed experiments on few qubit devices to identify the dominant causes of qubit decoherence. To attain high-fidelity control requires characterising the underlying atomic structure of qubit registers (≤4P). By combining precise (≤5% error) experimentally measured charging energies with high quality STM images and theoretically modelled charging energies, we show the number of phosphorus atoms present can be determined confidently. Previously, our all-epitaxial nat-Si devices have demonstrated record low charge noise (0.17µeV). In this thesis we consider a new Si-28 growth recipe to assess if introducing an annealed ∼1nm silicon locking layer grown at room temperature can further increase the silicon encapsulation quality, whilst minimising P segregation. We first optimised the geometry of SET charge sensors fabricated in Si-28 to obtain high current contrast (≫1nA). For the locking layer (standard recipe) single electron transistors we found high (low) levels of charge noise at 0V (2.1µeV) that increased with the applied voltage (at 0V (0.29µeV) and 0.5V (0.23µeV)). In addition, we found that the electrical behaviour of the locking layer sensors was highly sensitive to the applied voltage. Since qubits are typically operated at ∼0.5V, further work is needed to assess the viability of this new growth recipe. Finally, we investigated different charge and magnetic noise sources that cause qubit decoherence in a 3P register using a modified Hahn echo experiment. Here, we use resonant drive at the frequencies of different nuclear spin species to identify P-31 in the SET island as causing qubit decoherence. Further, we found that the dominant charge noise source for electron spin qubits was the Stark shift of the g-factor. We also found the spin flip rate of phosphorus nuclei in the spin bath was affected by a change in the mechanical noise coupling into the fridge. For nuclear spin qubits we found the dominant noise source to be the Stark shift of the hyperfine interaction.
The realisation of a large-scale error corrected quantum computer relies on our ability to reproducibly manufacture qubits that are fast, highly coherent, controllable and stable. The promise of achieving this in a highly manufacturable platform such as silicon requires a deep understanding of the materials issues that impact device operation. In this talk I will demonstrate how we engineer every aspect of the processor using atom qubits in silicon for fast, controllable exchange coupling [1], fast, high fidelity qubit initialisation and read-out [2]; low noise all epitaxial gates for highly stable qubits [3], [4]; and efficient, high fidelity qubit control [5], [6] leading to the demonstration of the highest fidelity Grover's algorithm to date [7].
We report a nanofabrication, control and measurement scheme for charge-based silicon quantum computing which utilises a new technique of controlled single ion implantation. Each qubit consists of two phosphorus dopant atoms ~50 nm apart, one of which is singly ionized. The lowest two energy states of the remaining electron form the logical states. Surface electrodes control the qubit using voltage pulses and dual single electron transistors operating near the quantum limit provide fast readout with spurious signal rejection. A low energy (keV) ion beam is used to implant the phosphorus atoms in high-purity Si. Single atom control during the implantation is achieved by monitoring on-chip detector electrodes, integrated within the device structure, while positional accuracy is provided by a nanomachined resist mask. We describe a construction process for implanted single atom and atom cluster devices with all components registered to better than 20 nm, together with electrical characterisation of the readout circuitry. We also discuss universal one- and two-qubit gate operations for this architecture, providing a possible path towards quantum computing in silicon.
A high degree of controllability and long coherence time make the nuclear spin of a phosphorus donor in isotopically purified silicon a promising candidate for a quantum bit. However, long-distance two-qubit coupling and fast, robust gates remain outstanding challenges for these systems. Here, following recent proposals for long-distance coupling via dipole-dipole interactions, we present a simple method to implement fast, high-fidelity arbitrary single- and two-qubit gates in the absence of charge noise. Moreover, we provide a method to make the single-qubit gates robust to moderate levels of charge noise to well within an error bound of ${10}^{\ensuremath{-}3}$.
The exceptionally long quantum coherence times of phosphorus donor nuclear spin qubits in silicon, coupled with the proven scalability of silicon-based nano-electronics, make them attractive candidates for large-scale quantum computing. However, the high threshold of topological quantum error correction can only be captured in a two-dimensional array of qubits operating synchronously and in parallel-posing formidable fabrication and control challenges. We present an architecture that addresses these problems through a novel shared-control paradigm that is particularly suited to the natural uniformity of the phosphorus donor nuclear spin qubit states and electronic confinement. The architecture comprises a two-dimensional lattice of donor qubits sandwiched between two vertically separated control layers forming a mutually perpendicular crisscross gate array. Shared-control lines facilitate loading/unloading of single electrons to specific donors, thereby activating multiple qubits in parallel across the array on which the required operations for surface code quantum error correction are carried out by global spin control. The complexities of independent qubit control, wave function engineering, and ad hoc quantum interconnects are explicitly avoided. With many of the basic elements of fabrication and control based on demonstrated techniques and with simulated quantum operation below the surface code error threshold, the architecture represents a new pathway for large-scale quantum information processing in silicon and potentially in other qubit systems where uniformity can be exploited.
Practical quantum computers require a large network of highly coherent qubits, interconnected in a design robust against errors. Donor spins in silicon provide state-of-the-art coherence and quantum gate fidelities, in a platform adapted from industrial semiconductor processing. Here we present a scalable design for a silicon quantum processor that does not require precise donor placement and leaves ample space for the routing of interconnects and readout devices. We introduce the flip-flop qubit, a combination of the electron-nuclear spin states of a phosphorus donor that can be controlled by microwave electric fields. Two-qubit gates exploit a second-order electric dipole-dipole interaction, allowing selective coupling beyond the nearest-neighbor, at separations of hundreds of nanometers, while microwave resonators can extend the entanglement to macroscopic distances. We predict gate fidelities within fault-tolerance thresholds using realistic noise models. This design provides a realizable blueprint for scalable spin-based quantum computers in silicon.Quantum computers will require a large network of coherent qubits, connected in a noise-resilient way. Tosi et al. present a design for a quantum processor based on electron-nuclear spins in silicon, with electrical control and coupling schemes that simplify qubit fabrication and operation.