A low-quantum-cost reversible circuit for future image-processing hardware: design and Qiskit-based verification
Mojtaba Noorallahzadeh, Seyed‐Sajad Ahmadpour, Neeraj Kumar Misra +3 more
Image processing hardware should be able to perform repeated pixel-level operations with minimal overhead by designing compact arithmetic-logic circuitry. A compact reversible logic architecture offers a promising alternative to conventional architectures in image-processing applications due to its high throughput and energy efficiency. Additionally, reversible arithmetic circuits minimize resource utilization while preserving computational functionality, providing a scalable foundation for quantum-inspired computing platforms. The aim of this paper is to develop a low-quantum-cost reversible arithmetic-logic circuit that could serve as the basis of quantum-inspired image processing systems in the future. The proposed design incorporates only three gates, 16 selector-controlled outputs, four garbage outputs, and three constant inputs. The proposed design uses three composite reversible blocks. Its resource requirements are compared with earlier reversible ALU designs using the reported quantum costs, gate counts, garbage outputs, and constant inputs. The design does not propose a complete image processor, but rather a contribution at the circuit level.
Ain Shams Engineering Journal•Sep 26, 2026•0 citations