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Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference

19.2 A 110mK 295µW 28nm FDSOI CMOS Quantum Integrated Circuit with a 2.8GHz Excitation and nA Current Sensing of an On-Chip Double Quantum Dot

Loïck Le Guevel, G. Billiot, X. Jehl, Silvano De Franceschi, Marcos Zurita, Yvain Thonnart, M. Vinet, M. Sanquer, Romain Maurand, Aloysius G. M. Jansen, Gaël Pillonnet

Published Feb 1, 2020• 72 citations
Publisher

Abstract

To reach quantum supremacy, quantum computers need >50 logical qubits with <; mv accurate biasing, GHz-range signal handling, and μs readout of thousands of physical qubits at sub-Kelvin temperatures. Silicon-based qubits are a promising approach to scale the qubit number owing to their low footprint (100nm) and gaining from the CMOS industrial background to reach maturity [1]. Moreover, the quantum silicon choice allows the IC community to integrate large-scale qubit-control electronics directly nearby the quantum silicon core, thus drastically reducing the wire-connection number and qubit-addressing fanout, meanwhile increasing the operation bandwidth for error correction and the spin-readout sensitivity.

DOI
10.1109/isscc19947.2020.9063090

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To reach quantum supremacy, quantum computers need >50 logical qubits with <; mv accurate biasing, GHz-range signal handling, and μs readout of thousands of physical qubits at sub-Kelvin temperatures. Silicon-based qubits are a promising approach to scale the qubit number owing to their low footprint (100nm) and gaining from the CMOS industrial background to reach maturity [1]. Moreover, the quantum silicon choice allows the IC community to integrate large-scale qubit-control electronics directly nearby the quantum silicon core, thus drastically reducing the wire-connection number and qubit-addressing fanout, meanwhile increasing the operation bandwidth for error correction and the spin-readout sensitivity.
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Solid-state quantum computers require classical electronics to control and readout individual qubits and to enable fast classical data processing [1-3]. Integrating both subsystems at deep cryogenic temperatures [4], where solid-state quantum processors operate best, may solve some major scaling challenges, such as system size and input/output (I/O) data management [5]. Spin qubits in silicon quantum dots (QDs) could be monolithically integrated with complementary metal-oxide-semiconductor (CMOS) electronics using very-large-scale integration (VLSI) and thus leveraging over wide manufacturing experience in the semiconductor industry [6]. However, experimental demonstrations of integration using industrial CMOS at mK temperatures are still in their infancy. Here we present a cryogenic integrated circuit (IC) fabricated using industrial CMOS technology that hosts three key ingredients of a silicon-based quantum processor: QD arrays (arranged here in a non-interacting 3x3 configuration), digital electronics to minimize control lines using row-column addressing and analog LC resonators for multiplexed readout, all operating at 50 mK. With the microwave resonators (6-8 GHz range), we show dispersive readout of the charge state of the QDs and perform combined time- and frequency-domain multiplexing, enabling scalable readout while reducing the overall chip footprint. This modular architecture probes the limits towards the realization of a large-scale silicon quantum computer integrating quantum and classical electronics using industrial CMOS technology.
Quantum computing holds the promise to solve many of today's intractable problems. A solid-state quantum computer (QC) is generally made of an array of qubits implemented in one of many solid-state technologies and operating at deep-cryogenic temperatures (10-to-20mK). Silicon spin qubits are a promising candidate for scalable QCs, due to their size, long coherence times and potential for co-integration with the required classical control and readout electronics. Recently, semiconductor spin qubits have been demonstrated to operate at ~1K, thus accelerating the achievement of a compact QC [1]. Classical qubit control electronics has also progressed, with the demonstration of fully-integrated control of spin qubits [2] and transmons [3] implemented in a cryo-CMOS technology. While a cryo-CMOS integrated circuit has been co-integrated with quantum dots [4], fully-integrated readout electronics has not yet been addressed in the literature.
Much research in quantum bit (qubit) devices is paving the way for large scale quantum computers that will be able to address computational tasks beyond the reach of classical computers. Among multiple possibilities for building such a computer, the use of silicon technologies is a promising approach due to the high potential for integration. This talk will describe the state-of-the-art on spin qubit readout and control and describe our work towards cryogenic low-noise amplifiers in 28 nm FDSOI technology.
Quantum computing promises to revolutionize our lives, achieving unprecedented computational powers and unlocking new possibilities in drug discovery, chemical simulations and cryptography. The fundamental unit of computation of a quantum computer is the quantum bit (qubit). It can be implemented in a number of technologies, such as superconducting qubits, spin qubits, photonic systems, trapped ions and NV-centers. Solid-state superconducting qubits and spin qubits seem to be the most promising ones, as shown by the recent demonstration of quantum supremacy with a superconducting qubit processor. Such quantum processors, to operate in the quantum regime, require very low temperatures around 10 mK, and they are hence kept inside dilution fridges. The electronics required to read out and control such processors is typically realized by discrete components or bulky scientific instruments at room temperature wired into the dilution fridge. Such approach is only feasible until few (< 100) qubits are handled, but it is not scalable for million-qubit processors required for fault-tolerant operation. In this thesis, readout and control electronics is proposed to be integrated and operated directly at cryogenic temperatures, in close proximity with the qubits and potentially even co-integrated. CMOS technology is advocated for its scalability, compactness and low prototyping cost, to create a comprehensive cryo-CMOS class of fully-integrated transceivers to read out and control solid-state qubits. In particular, the thesis focuses on cryo-CMOS radio-frequency integrated circuits for the readout of silicon quantum computers, looking to integrate the whole readout system, from the quantum layer to the room temperature user interface. Cryogenic CMOS devices are explored first, to lay the foundations of integrated circuit design. The realization of quantum dots in standard CMOS technology is explored as a platform to realize solid-state qubit arrays, demonstrating functionality at 50 mK and good reproducibility. Moreover, the operation of integrated transistors at 50 mK and 4.2 K is explored to understand their basic cryogenic functionality, through characterization and modeling. Then also integrated passives, such as capacitors, inductors and transformers, are studied and modeled at cryogenic temperatures. Then, a fully-integrated readout platform spanning across all the blocks needed for dispersive readout is proposed. A fully-integrated matrix of quantum dots with radio-frequency gate-based readout capabilities is demonstrated along with time- and frequency-multiplexing. This quantum-classical circuit shows all the features for a scalable approach and is the core of the platform following it. A cryogenic CMOS circulator based on a new all-pass filter architecture is demonstrated, to be used as integrated replacement for current bulky counterparts; it allows power reduction, insertion loss and bandwidth enhancement with respect to state-of-the-art integrated circulators. The rest of the front-end is also explored with dedicated test multiplexers, a low noise-amplifier and an oscillator, that are finally merged in a single fully-integrated low-noise receiver with frequency synthesizer operating at 3.5 K for scalable multiplexed readout of silicon qubits. The platform presented in this thesis, across temperature boundaries, carries all the features required for future scalable silicon quantum computing platforms and could therefore form their core.