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Quantum Information and Computation

High performance error correction for quantum key distribution using polar codes

JouguetPaul, Kunz-JacquesSebastien

Published Mar 1, 2014• 1 citation
Publisher

Abstract

We study the use of polar codes for both discrete and continuous variables Quantum Key Distribution (QKD). Although very large blocks must be used to obtain the efficiency required by quantum key d...
DOI
10.5555/2600508.2600516

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We study the use of polar codes for both discrete and continuous variables Quantum Key Distribution (QKD). Although very large blocks must be used to obtain the efficiency required by quantum key distribution, and especially continuous variables quantum key distribution, their implementation on generic x86 Central Processing Units (CPUs) is practical. Thanks to recursive decoding, they exhibit excellent decoding speed, much higher than large, irregular Low Density Parity Check (LDPC) codes implemented on similar hardware, and competitive with implementations of the same codes on high-end Graphic Processing Units (GPUs).
Polar coding is the most recent encoding scheme in the quest for error correction codes that approaches the Shannon limit, has a simple structure, and admits fast decoders. As such, it is an interesting candidate for the quantum key distribution (QKD) protocol that normally operates at high bit error rates and requires codes that operate near the Shannon limit. This paper describes approaches that integrate Polar codes into the QKD environment and provides performance results of Polar code designs within the QKD protocol.
As the possibility of a genuine, functioning quantum computer becomes closer to reality every day, so does the urge to use the principles of quantum physics to improve the security of communications. One of the most studied areas of quantum communication is quantum key distribution (QKD), however there are still challenges to overcome, such as low detection accuracy, the need for extensive computation, and the lack of extremely efficient error correction. Even though Continuous Variable QKD has seen some significant advancements, there hasn't been much effort to integrate these advancements to make the CVQKD system stronger. By combining discrete modulation, the use of decoy states with the combination of cascade reconciliation and effective polar code-based error correction, our work aims to make the CVQKD more feasible for practical implementation and offer a secure, accurate, and noise-resistant Q KD protocol.
Quantum key distribution (QKD) leverages the principles of quantum mechanics to generate unconditionally secure keys for remote communication, even in the presence of an eavesdropper with unlimited computational power. A critical component of QKD is information reconciliation (IR), which corrects bit errors introduced by system imperfections and channel noise, ensuring the integrity of the shared key. Polar codes-based IR schemes have attracted considerable attention due to their near-Shannon-limit performance and low computational complexity. However, existing implementations primarily rely on CPUs or GPUs, which are suboptimal in terms of performance and energy efficiency. Here, we present a hardware accelerator designed specifically for discrete variable QKD (DV-QKD), targeting polar codes-based IR and implemented on a cost-effective FPGA platform. Our design achieves high throughput and scalability by employing a module-level pipeline parallel structure, a fully parallelized decoding strategy, and a hybrid memory architecture. This approach enhances decoder efficiency and optimizes resource utilization. On this platform, we demonstrate an IR throughput of 35.33 Mbps for a block size of [Formula: see text], providing a real-time, cost-efficient solution that significantly enhances the performance of QKD systems.