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Journal of the Japan Society for Precision Engineering

Technologies for Superconducting Quantum Bits

Eisuke Abe, Shuhei Tamate

Published Dec 4, 2019• 0 citations
Publisher
DOI
10.2493/jjspe.85.1048

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A superconducting qubit (or quantum bit), which consists of a micrometer-sized loop with three Josephson junctions, has two persistent currents of opposite direction as its two states. The states of the qubit can be brought into quantum coherence to perform quantum computing. Classical bits can also be obtained from these superconducting loops, making it possible to base a classical computer architecture. We study a novel computing structure based on these Josephson Persistent Current (PC) Bits, starting from elementary logic gates to a Random Access Memory (RAM). The investigation shows that the Josephson PC Bit technology would not surpass semiconductor technology in term of the device density, while it is a promising candidate for unltra-fast memory, which can be integrated with other technologies. The classical computer might also serve as pre and post processor for the quantum computing performed in the heart of the array. The Josephson PC circuits, therefore, seems a good vehicle for the study of the quantum computer paradigm.
Communications transmitters, receivers, radar applications, and related test equipment require precise control over generated frequencies which can be provided by digital synthesis. Superconductivity technology offers to greatly improve the operational frequency range at a tiny fraction of the power of present GaAs and Si digital frequency synthesizers, an important consideration for systems with multiple receiver elements and satellite applications. We designed, fabricated, and tested a digital superconducting frequency synthesizer on a 1-cm square substrate in niobium technology and tested at 4 Kelvin. The chip contains a 12-bit pipelined MVTL incremental phase accumulator (simple expansion to 32 bits achieves one part in 4.3/spl times/10/sup 9/ frequency resolution). The most significant 10-bits of the accumulated phase proceed to a Sine ROM which is based on SQUID cells and employs data compression to minimize circuit size. An 8-bit ROM output word proceeds to a superconducting D/A converter to construct the analog output waveform which updates each clock cycle. We have operated the entire superconducting synthesizer above 1 GHz. Our performance goal with present fabrication technology is /spl ges/4 GHz operation.