Quantum computers capable of practical information processing are emerging rapidly. As these devices become more advanced, tools will be needed for converting generalized quantum algorithms into formally-verified forms that are executable on real quantum machines. In this work, a prototype tool is presented that transforms quantum algorithms into executable specifications where optimization procedures yield 9-24 % cost improvement on a range of benchmarks. Additionally, the tool incorporates formal verification internally with Quantum Multiple-valued Decision Diagrams to confirm that the generated technology-dependent executable is functionally equivalent to the original, technology-independent algorithm. Experimental results are provided that target the Rigetti family of quantum processing units although the tool may also target other architectures.
Quantum computers capable of practical information processing are emerging rapidly. As these devices become more advanced, tools will be needed for converting generalized quantum algorithms into formally-verified forms that are executable on real quantum machines. In this work, a prototype tool is presented that transforms quantum algorithms into executable specifications where optimization procedures yield 9-24 % cost improvement on a range of benchmarks. Additionally, the tool incorporates formal verification internally with Quantum Multiple-valued Decision Diagrams to confirm that the generated technology-dependent executable is functionally equivalent to the original, technology-independent algorithm. Experimental results are provided that target the Rigetti family of quantum processing units although the tool may also target other architectures.
Quantum computing, once just a theoretical field, is quickly advancing as physical quantum technology increases in size, capability, and reliability. In order to fully harness the power of a general quantum computer or an application-specific device, compilers and tools must be developed that optimize specifications and map them to a realization on a specific architecture. In this work, a technique and prototype tool for synthesizing algorithms into a quantum computer is described and evaluated. Most recently reported methods produce technologically-independent reversible cascades comprised of a functionally complete set of operators with no regard to actual technologically-dependent cell libraries or constraints due to a device's pre-configured interconnectivity. In contrast, our prototype tool synthesizes algorithms into technologically-dependent specifications that consist of a set of primitives and connectivity constraints present in the computer architecture. The tool performs optimizations based on actual architectural constraints, and a high-quality technology-dependent synthesized result is achieved through the use of optimizing cost functions derived from real hardware and architecture parameters. Additionally, another important aspect of our tool is the incorporation of internal formal equivalence checking that ensures the initially specified algorithm is functionally equivalent to the optimized, technologically-mapped output. Experimental results are provided that target the IBM Q family of quantum computers.
The models and rules of quantum computation and quantum information processing (QIP) differ greatly from those that govern classical computation, and these differences have caused the implementation of quantum processing devices with a variety of new technologies. Many platforms have been developed in parallel, but at the time of writing, one method of quantum computing has not shown to be superior to the rest. Because of the variation that exists between quantum platforms, even between those of the same technology, there must be a way to automatically synthesize technology-independent quantum designs into forms that are capable of physical realization on a quantum computer (QC) with specific operating parameters. Additionally, results of synthesis must be formally verified to confirm that output technology-dependent specifications are logically identical to their original, technology-independent forms. The first contribution of this work to the field of quantum computing is the creation of such a methodology. Quantum technology mapping and optimization for machines with fixed coupling maps and libraries of gates can be performed with an automatic quantum compiler, and the development and test of this compiler will be explored in this dissertation. Furthermore, this compiler can be considered in a more general context to be a synthesis tool for QIP circuits in a specific realization technology, many of which are capable of implementing systems where the radix of computation, r, is greater than two. As a result of this ability, the second contribution of this work is the presentation of architectures for higher-dimensional quantum entanglement.
The design and compilation of correct, efficient quantum circuits is integral to the future operation of quantum computers. This thesis makes contributions to the problems of optimizing and verifying quantum circuits, with an emphasis on the development of formal models for such purposes. We also present software implementations of these methods, which together form a full stack of tools for the design of optimized, formally verified quantum oracles. \n \nOn the optimization side, we study methods for the optimization of Rz and CNOT gates in Clifford+Rz circuits. We develop a general, efficient optimization algorithm called phase folding, which reduces the number of Rz gates without increasing any metrics by computing its phase polynomial. This algorithm can further be combined with synthesis techniques for CNOT-dihedral operators to optimize circuits with respect to particular costs. We then study the optimal synthesis problem for CNOT-dihedral operators from the perspectives of Rz and CNOT gate optimization. In the case of Rz gate optimization, we show that the optimal synthesis problem is polynomial-time equivalent to minimum-distance decoding in certain Reed-Muller codes. For the CNOT optimization problem, we show that the optimal synthesis problem is at least as hard as a combinatorial problem related to Gray codes. In both cases, we develop heuristics for the optimal synthesis problem, which together with phase folding reduces T counts by 42% and CNOT counts by 22% across a suite of real-world benchmarks. \n \nFrom the perspective of formal verification, we make two contributions. The first is the development of a formal model of quantum circuits with ancillary bits based on the Feynman path integral, along with a concrete verification algorithm. The path integral model, with some syntactic sugar, further doubles as a natural specification language for quantum computations. Our experiments show some practical circuits with up to hundreds of qubits can be efficiently verified. Our second contribution is a formally verified, optimizing compiler for reversible circuits. The compiler compiles a classical, irreversible language to reversible circuits, with a formal, machine-checked proof of correctness written in the proof assistant F*. The compiler is structured as a partial evaluator, allowing verification to be carried out significantly faster than previous results.
Quantum circuit optimization is crucial for realizing the full potential of quantum computing. However, the inherent complexity of quantum circuits and the potential for errors introduce significant challenges in ensuring the correctness and efficiency of optimization algorithms. This paper proposes a novel approach to formally verify quantum circuit optimization algorithms. We translate these algorithms into formal specification languages and leverage model checking and theorem proving techniques to rigorously demonstrate that the algorithms meet their intended objectives – primarily minimizing circuit complexity – without introducing unintended side effects. The core contribution lies in applying formal verification methodologies to this largely unexplored area, offering a path towards building trust and confidence in quantum optimization strategies. The presented framework provides a systematic method for ensuring the reliability of quantum circuits, a critical step towards practical quantum computation. The verification process relies on defining the desired behavior as a set of logical properties and then employing automated tools to check whether the optimized circuit satisfies these properties. This approach addresses the fundamental need for rigorous assurance in quantum systems, moving beyond empirical validation and towards mathematically proven correctness.
Quantum circuit compilation is a crucial step in translating high-level quantum algorithms into executable quantum circuits on specific hardware. The complexity and potential for errors within this process necessitate rigorous verification methods. This paper proposes a novel approach leveraging symbolic execution to formally verify quantum circuit compilation. We represent quantum circuits and compilation steps as a symbolic program, enabling the exploration of all possible compilation paths. By incorporating quantum gate fidelities and noise models into the symbolic execution engine, we can identify potential errors in the compilation logic, providing a robust and systematic way to ensure the correctness of the compilation process. The core claim is that symbolic execution can be extended to formally verify the correctness of quantum circuit compilation processes. This work addresses a critical need in quantum computing, offering a new technique for building trust and reliability into quantum software.
High-level descriptions of quantum algorithms do not take the restrictions of physical hardware into account. Therefore actually executing an algorithm in the form of a quantum circuit on a quantum computer requires compiling it for the desired target architecture first. The compilation of quantum circuits depends on efficient methods to be feasible for all but the trivial instances. To this end, different compiling methods have been introduced in the past, but room for improvement still exists. Moreover, just an efficient compilation process itself is not sufficient-the resulting circuits must be correct as well. In this summary paper, we review how existing compilation approaches can be optimized by utilizing heuristic search algorithms or exact reasoning engines. Furthermore, we review how the correctness of the obtained results can be verified afterwards by clever data structures such as decision diagrams. This illustrates core steps of a compilation flow which can generate minimal or close-to-minimal results for many instances and, additionally, guarantees correctness throughout the process.