Transitioning quantum computing from laboratory physical demonstrations to practical, utility-scale processing requires bridging a multi-order-of-magnitude gap between physical gate fidelities and algorithmic error thresholds. While fault-tolerant quantum computing relies on quantum error correction to span this divide, traditional evaluation metrics focused on isolated physical components fail to reflect real-world execution capacity. In this Perspective, we analyze the physical and microarchitectural bottlenecks governing scalable quantum compute engines: the spatial footprint trade-offs between code encoding efficiency and hardware routing, the temporal latencies of closed-loop decoding under strict cryogenic thermal budgets, and the structural performance asymmetries of modular multi-chip networks. We argue that overcoming these multi-faceted scalability barriers demands moving beyond single-layer hardware optimizations toward a holistic full-stack co-design paradigm—jointly tailoring error-correcting code topologies, control microarchitectures, and interconnect networks to unlock sustainable logical throughput.
Achieving practical quantum advantage on fault-tolerant quantum computers (FTQC) is fundamentally constrained by the substantial spatial and temporal overheads required to map logical operations onto physical hardware. Existing compilation approaches typically adopt coarse-grained, slice-based abstractions that overlook fine-grained microarchitectural effects, such as routing contention, leading to inefficient resource utilization and limited alignment between algorithm structure and hardware capabilities.
We introduce Qomet, a microarchitecture-aware compiler that tightly couples algorithmic properties with lattice surgery (LS) execution. By exploiting C-Phase gate commutativity, Qomet translates sequential operations into simultaneous multi-target interactions, natively leveraging LS to eliminate false dependencies and expose instruction-level parallelism. To support this, Qomet employs an adaptive, event-driven scheduler that captures precise spatial and routing constraints to overlap instructions temporally. By minimizing grid idling and routing contention, Qomet achieves a geometric-mean execution speedup of 4.29
× and a maximum speedup of 59.7
× across realistic workloads.
Recent experimental advances have demonstrated technologies capable of supporting scalable quantum computation. A critical next step is how to put those technologies together into a scalable, fault-tolerant system that is also feasible. We propose a quantum logic array (QLA) microarchitecture that forms the foundation of such a system. The QLA focuses on the communication resources necessary to efficiently support fault-tolerant computations. We leverage the extensive groundwork in quantum error correction theory and provide analysis that shows that our system is both asymptotically and empirically fault tolerant. Specifically, we use the QLA to implement a hierarchical, array-based design and a logarithmic expense quantum-teleportation communication protocol. Our goal is to overcome the primary scalability challenges of reliability, communication, and quantum resource distribution that plague current proposals for large-scale quantum computing. Our work complements recent work by Balenseifer et al. (2005), which studies the software tool chain necessary to simplify development of quantum applications; here we focus on modeling a full-scale optimized microarchitecture for scalable computing.