Design of a parallel hardware architecture for Quantum Annealing Algorithm acceleration

Evelina Forno, Andrea Acquaviva, Yuki Kobayashi +2 more

Quantum Annealing (QA) is an emerging technique, derived from Simulated Annealing, providing metaheuristics for multivariable optimisation problems. Studies have shown that it can be applied to solve NP-hard problems with faster convergence and better quality of result than other traditional heuristics, with potential applications in a variety of fields, from transport logistics to circuit synthesis and optimisation. In this paper, we present a hardware architecture implementing a QA-based solver for the Multidimensional Knapsack Problem, designed to improve the performance of the algorithm by exploiting parallelised computation. We synthesised the architecture using as a target an Altera FPGA board and simulated the execution for solving a set of benchmarks available in the literature. Simulation results show that the proposed implementation is about 100 times faster than a single-thread general-purpose CPU without impact on the accuracy of the solution.

Hasitha Muthumala Waidyasooriya, Masanori Hariyama

Jincheng Zhang

This paper explores the potential of quantum-inspired hardware acceleration for graph algorithms. Traditional hardware acceleration techniques often struggle to efficiently exploit the inherent parallelism within graph computations. We propose a novel approach leveraging concepts from quantum mechanics, specifically superposition and entanglement, to design specialized hardware architectures. This approach aims to achieve significant performance improvements by enabling parallel processing and optimized data movement within graph algorithms. The core claim is that specialized hardware, inspired by quantum principles, can dramatically speed up graph algorithms. This research investigates the feasibility and potential impact of such designs, paving the way for future advancements in graph processing. The presented methodology focuses on architectural design and performance estimation, without requiring experimental validation.

Mark W. Johnson

Jincheng Zhang

This paper proposes a novel approach to deep learning model architecture design by leveraging the principles of quantum annealing. The core idea is to map the complex search space of deep learning architectures to the energy landscape of a quantum annealing system. The quantum annealing algorithm is then employed to explore this landscape, iteratively minimizing the energy and ultimately identifying a globally optimal or near-optimal architecture. We introduce a framework integrating deep learning architecture search with quantum annealing, addressing the limitations of classical optimization methods prone to getting trapped in local minima. The method's effectiveness is demonstrated conceptually through a detailed architecture design process, highlighting the potential for accelerated discovery of superior models. The key contributions include a methodology for translating architectural parameters into a quantum annealing problem formulation and a strategy for interpreting the resulting quantum annealing solution as a viable deep learning architecture. Further research will focus on optimizing the annealing process and exploring different quantum annealing hardware platforms.

Yi-Hua Chung, Cheng-Jhih Shih, Shih‐Hao Hung